Add support for .cfi_register now that it is easy to extent the representation

to support it. Original patch with the parsing and plumbing by the PaX team and
Roman Divacky. I added the bits in MCDwarf.cpp and the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168565 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2012-11-25 15:14:49 +00:00
parent a91eead943
commit f4f14f68f6
7 changed files with 125 additions and 5 deletions

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@ -267,18 +267,27 @@ namespace llvm {
public:
enum OpType { OpSameValue, OpRememberState, OpRestoreState, OpOffset,
OpDefCfaRegister, OpDefCfaOffset, OpDefCfa, OpRelOffset,
OpAdjustCfaOffset, OpEscape, OpRestore, OpUndefined };
OpAdjustCfaOffset, OpEscape, OpRestore, OpUndefined,
OpRegister };
private:
OpType Operation;
MCSymbol *Label;
unsigned Register;
int Offset;
union {
int Offset;
unsigned Register2;
};
std::vector<char> Values;
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R,
int O, StringRef V) :
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, StringRef V) :
Operation(Op), Label(L), Register(R), Offset(O),
Values(V.begin(), V.end()) {
assert(Op != OpRegister);
}
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2) :
Operation(Op), Label(L), Register(R1), Register2(R2) {
assert(Op == OpRegister);
}
public:
@ -335,6 +344,11 @@ namespace llvm {
return MCCFIInstruction(OpEscape, L, 0, 0, Vals);
}
static MCCFIInstruction
createRegister(MCSymbol *L, unsigned Register1, unsigned Register2) {
return MCCFIInstruction(OpRegister, L, Register1, Register2);
}
OpType getOperation() const { return Operation; }
MCSymbol *getLabel() const { return Label; }
@ -342,10 +356,15 @@ namespace llvm {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRestore || Operation == OpUndefined ||
Operation == OpSameValue || Operation == OpDefCfaRegister ||
Operation == OpRelOffset);
Operation == OpRelOffset || Operation == OpRegister);
return Register;
}
unsigned getRegister2() const {
assert(Operation == OpRegister);
return Register2;
}
int getOffset() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRelOffset || Operation == OpDefCfaOffset ||

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@ -517,6 +517,7 @@ namespace llvm {
virtual void EmitCFIEscape(StringRef Values);
virtual void EmitCFISignalFrame();
virtual void EmitCFIUndefined(int64_t Register);
virtual void EmitCFIRegister(int64_t Register1, int64_t Register2);
virtual void EmitWin64EHStartProc(const MCSymbol *Symbol);
virtual void EmitWin64EHEndProc();

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@ -227,6 +227,7 @@ public:
virtual void EmitCFIAdjustCfaOffset(int64_t Adjustment);
virtual void EmitCFISignalFrame();
virtual void EmitCFIUndefined(int64_t Register);
virtual void EmitCFIRegister(int64_t Register1, int64_t Register2);
virtual void EmitWin64EHStartProc(const MCSymbol *Symbol);
virtual void EmitWin64EHEndProc();
@ -1047,6 +1048,16 @@ void MCAsmStreamer::EmitCFIUndefined(int64_t Register) {
EmitEOL();
}
void MCAsmStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
MCStreamer::EmitCFIRegister(Register1, Register2);
if (!UseCFI)
return;
OS << "\t.cfi_register " << Register1 << ", " << Register2;
EmitEOL();
}
void MCAsmStreamer::EmitWin64EHStartProc(const MCSymbol *Symbol) {
MCStreamer::EmitWin64EHStartProc(Symbol);

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@ -938,6 +938,19 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
bool VerboseAsm = Streamer.isVerboseAsm();
switch (Instr.getOperation()) {
case MCCFIInstruction::OpRegister: {
unsigned Reg1 = Instr.getRegister();
unsigned Reg2 = Instr.getRegister2();
if (VerboseAsm) {
Streamer.AddComment("DW_CFA_register");
Streamer.AddComment(Twine("Reg1 ") + Twine(Reg1));
Streamer.AddComment(Twine("Reg2 ") + Twine(Reg2));
}
Streamer.EmitIntValue(dwarf::DW_CFA_register, 1);
Streamer.EmitULEB128IntValue(Reg1);
Streamer.EmitULEB128IntValue(Reg2);
return;
}
case MCCFIInstruction::OpUndefined: {
unsigned Reg = Instr.getRegister();
if (VerboseAsm) {

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@ -398,6 +398,8 @@ public:
&GenericAsmParser::ParseDirectiveCFISignalFrame>(".cfi_signal_frame");
AddDirectiveHandler<
&GenericAsmParser::ParseDirectiveCFIUndefined>(".cfi_undefined");
AddDirectiveHandler<
&GenericAsmParser::ParseDirectiveCFIRegister>(".cfi_register");
// Macro directives.
AddDirectiveHandler<&GenericAsmParser::ParseDirectiveMacrosOnOff>(
@ -436,6 +438,7 @@ public:
bool ParseDirectiveCFIEscape(StringRef, SMLoc DirectiveLoc);
bool ParseDirectiveCFISignalFrame(StringRef, SMLoc DirectiveLoc);
bool ParseDirectiveCFIUndefined(StringRef, SMLoc DirectiveLoc);
bool ParseDirectiveCFIRegister(StringRef, SMLoc DirectiveLoc);
bool ParseDirectiveMacrosOnOff(StringRef, SMLoc DirectiveLoc);
bool ParseDirectiveMacro(StringRef, SMLoc DirectiveLoc);
@ -3263,6 +3266,29 @@ bool GenericAsmParser::ParseDirectiveCFIUndefined(StringRef Directive,
return false;
}
/// ParseDirectiveCFIRegister
/// ::= .cfi_register register, register
bool GenericAsmParser::ParseDirectiveCFIRegister(StringRef Directive,
SMLoc DirectiveLoc) {
int64_t Register1 = 0;
if (ParseRegisterOrRegisterNumber(Register1, DirectiveLoc))
return true;
if (getLexer().isNot(AsmToken::Comma))
return TokError("unexpected token in directive");
Lex();
int64_t Register2 = 0;
if (ParseRegisterOrRegisterNumber(Register2, DirectiveLoc))
return true;
getStreamer().EmitCFIRegister(Register1, Register2);
return false;
}
/// ParseDirectiveMacrosOnOff
/// ::= .macros_on
/// ::= .macros_off

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@ -356,6 +356,14 @@ void MCStreamer::EmitCFIUndefined(int64_t Register) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
MCSymbol *Label = EmitCFICommon();
MCCFIInstruction Instruction =
MCCFIInstruction::createRegister(Label, Register1, Register2);
MCDwarfFrameInfo *CurFrame = getCurrentFrameInfo();
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::setCurrentW64UnwindInfo(MCWin64EHUnwindInfo *Frame) {
W64UnwindInfos.push_back(Frame);
CurrentW64UnwindInfo = W64UnwindInfos.back();

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@ -0,0 +1,42 @@
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s
f:
.cfi_startproc
nop
.cfi_register %rbp, %rax
nop
.cfi_endproc
// CHECK: # Section 4
// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame'
// CHECK-NEXT: ('sh_type', 0x00000001)
// CHECK-NEXT: ('sh_flags', 0x0000000000000002)
// CHECK-NEXT: ('sh_addr', 0x0000000000000000)
// CHECK-NEXT: ('sh_offset', 0x0000000000000048)
// CHECK-NEXT: ('sh_size', 0x0000000000000030)
// CHECK-NEXT: ('sh_link', 0x00000000)
// CHECK-NEXT: ('sh_info', 0x00000000)
// CHECK-NEXT: ('sh_addralign', 0x0000000000000008)
// CHECK-NEXT: ('sh_entsize', 0x0000000000000000)
// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410906 00000000')
// CHECK-NEXT: ),
// CHECK-NEXT: # Section 5
// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame'
// CHECK-NEXT: ('sh_type', 0x00000004)
// CHECK-NEXT: ('sh_flags', 0x0000000000000000)
// CHECK-NEXT: ('sh_addr', 0x0000000000000000)
// CHECK-NEXT: ('sh_offset', 0x0000000000000390)
// CHECK-NEXT: ('sh_size', 0x0000000000000018)
// CHECK-NEXT: ('sh_link', 0x00000007)
// CHECK-NEXT: ('sh_info', 0x00000004)
// CHECK-NEXT: ('sh_addralign', 0x0000000000000008)
// CHECK-NEXT: ('sh_entsize', 0x0000000000000018)
// CHECK-NEXT: ('_relocations', [
// CHECK-NEXT: # Relocation 0
// CHECK-NEXT: (('r_offset', 0x0000000000000020)
// CHECK-NEXT: ('r_sym', 0x00000002)
// CHECK-NEXT: ('r_type', 0x00000002)
// CHECK-NEXT: ('r_addend', 0x0000000000000000)
// CHECK-NEXT: ),
// CHECK-NEXT: ])
// CHECK-NEXT: ),