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Fix fp constant loads to have a destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) {
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unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
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// The extra reg is for addrmode5.
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc))
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.addReg(DestReg).addConstantPoolIndex(Idx)
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
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DestReg)
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.addConstantPoolIndex(Idx)
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.addReg(0));
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return DestReg;
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}
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