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What should be the last unnecessary <iostream>s in the library.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2006-12-07 22:21:48 +00:00
parent 6e49d8b4bf
commit f5da13367f
52 changed files with 2646 additions and 1822 deletions
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1
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -31,7 +31,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/MathExtras.h"
#include <cctype>
#include <iostream>
using namespace llvm;
namespace {

1
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -27,7 +27,6 @@
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Debug.h"
#include <iostream>
#include <vector>
using namespace llvm;

1
lib/Target/ARM/ARMRegisterInfo.cpp
View File

@ -24,7 +24,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/STLExtras.h"
#include <iostream>
using namespace llvm;
// hasFP - Return true if the specified function should have a dedicated frame

9
lib/Target/Alpha/AlphaAsmPrinter.cpp
View File

@ -24,7 +24,6 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
#include <iostream>
using namespace llvm;
namespace {
@ -105,7 +104,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
return;
case MachineOperand::MO_Immediate:
std::cerr << "printOp() does not handle immediate values\n";
cerr << "printOp() does not handle immediate values\n";
abort();
return;
@ -265,13 +264,13 @@ bool AlphaAsmPrinter::doFinalization(Module &M) {
"\t.section .data", I);
break;
case GlobalValue::GhostLinkage:
std::cerr << "GhostLinkage cannot appear in AlphaAsmPrinter!\n";
cerr << "GhostLinkage cannot appear in AlphaAsmPrinter!\n";
abort();
case GlobalValue::DLLImportLinkage:
std::cerr << "DLLImport linkage is not supported by this target!\n";
cerr << "DLLImport linkage is not supported by this target!\n";
abort();
case GlobalValue::DLLExportLinkage:
std::cerr << "DLLExport linkage is not supported by this target!\n";
cerr << "DLLExport linkage is not supported by this target!\n";
abort();
default:
assert(0 && "Unknown linkage type!");

5
lib/Target/Alpha/AlphaCodeEmitter.cpp
View File

@ -23,7 +23,6 @@
#include "llvm/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/Statistic.h"
#include <iostream>
using namespace llvm;
namespace {
@ -158,7 +157,7 @@ int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
rv = MO.getImmedValue();
} else if (MO.isGlobalAddress() || MO.isExternalSymbol()
|| MO.isConstantPoolIndex()) {
DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
DOUT << MO << " is a relocated op for " << MI << "\n";
unsigned Reloc = 0;
int Offset = 0;
bool useGOT = false;
@ -214,7 +213,7 @@ int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
Alpha::reloc_bsr,
MO.getMachineBasicBlock()));
}else {
std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();
}

3
lib/Target/Alpha/AlphaISelDAGToDAG.cpp
View File

@ -29,7 +29,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <iostream>
#include <queue>
#include <set>
using namespace llvm;
@ -115,7 +114,7 @@ namespace {
unsigned at = CountLeadingZeros_64(x);
uint64_t complow = 1 << (63 - at);
uint64_t comphigh = 1 << (64 - at);
//std::cerr << x << ":" << complow << ":" << comphigh << "\n";
//cerr << x << ":" << complow << ":" << comphigh << "\n";
if (abs(complow - x) <= abs(comphigh - x))
return complow;
else

4
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -22,8 +22,6 @@
#include "llvm/Function.h"
#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
#include <iostream>
using namespace llvm;
/// AddLiveIn - This helper function adds the specified physical register to the
@ -224,7 +222,7 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
if (ArgNo < 6) {
switch (ObjectVT) {
default:
std::cerr << "Unknown Type " << ObjectVT << "\n";
cerr << "Unknown Type " << ObjectVT << "\n";
abort();
case MVT::f64:
args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo],

1
lib/Target/Alpha/AlphaInstrInfo.cpp
View File

@ -15,7 +15,6 @@
#include "AlphaInstrInfo.h"
#include "AlphaGenInstrInfo.inc"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include <iostream>
using namespace llvm;
AlphaInstrInfo::AlphaInstrInfo()

37
lib/Target/Alpha/AlphaJITInfo.cpp
View File

@ -18,7 +18,6 @@
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include <cstdlib>
#include <iostream>
#include <map>
using namespace llvm;
@ -58,12 +57,12 @@ static void EmitBranchToAt(void *At, void *To) {
AtI[0] = BUILD_OR(0, 27, 27);
DEBUG(std::cerr << "Stub targeting " << To << "\n");
DOUT << "Stub targeting " << To << "\n";
for (int x = 1; x <= 8; ++x) {
AtI[2*x - 1] = BUILD_SLLi(27,27,8);
unsigned d = (Fn >> (64 - 8 * x)) & 0x00FF;
// DEBUG(std::cerr << "outputing " << hex << d << dec << "\n");
//DOUT << "outputing " << hex << d << dec << "\n";
AtI[2*x] = BUILD_ORi(27, 27, d);
}
AtI[17] = BUILD_JMP(31,27,0); //jump, preserving ra, and setting pv
@ -87,12 +86,12 @@ extern "C" {
//rewrite the stub to an unconditional branch
if (((unsigned*)CameFromStub)[18] == 0x00FFFFFF) {
DEBUG(std::cerr << "Came from a stub, rewriting\n");
DOUT << "Came from a stub, rewriting\n";
EmitBranchToAt(CameFromStub, Target);
} else {
DEBUG(std::cerr << "confused, didn't come from stub at " << CameFromStub
<< " old jump vector " << oldpv
<< " new jump vector " << Target << "\n");
DOUT << "confused, didn't come from stub at " << CameFromStub
<< " old jump vector " << oldpv
<< " new jump vector " << Target << "\n";
}
//Change pv to new Target
@ -185,7 +184,7 @@ extern "C" {
);
#else
void AlphaCompilationCallback() {
std::cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
abort();
}
#endif
@ -199,7 +198,7 @@ void *AlphaJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
for (int x = 0; x < 19; ++ x)
MCE.emitWordLE(0);
EmitBranchToAt(Addr, Fn);
DEBUG(std::cerr << "Emitting Stub to " << Fn << " at [" << Addr << "]\n");
DOUT << "Emitting Stub to " << Fn << " at [" << Addr << "]\n";
return MCE.finishFunctionStub(0);
}
@ -250,30 +249,30 @@ void AlphaJITInfo::relocate(void *Function, MachineRelocation *MR,
case Alpha::reloc_literal:
//This is a LDQl
idx = MR->getGOTIndex();
DEBUG(std::cerr << "Literal relocation to slot " << idx);
DOUT << "Literal relocation to slot " << idx;
idx = (idx - GOToffset) * 8;
DEBUG(std::cerr << " offset " << idx << "\n");
DOUT << " offset " << idx << "\n";
break;
case Alpha::reloc_gprellow:
idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
idx = getLower16(idx);
DEBUG(std::cerr << "gprellow relocation offset " << idx << "\n");
DEBUG(std::cerr << " Pointer is " << (void*)MR->getResultPointer()
<< " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
DOUT << "gprellow relocation offset " << idx << "\n";
DOUT << " Pointer is " << (void*)MR->getResultPointer()
<< " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n";
break;
case Alpha::reloc_gprelhigh:
idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
idx = getUpper16(idx);
DEBUG(std::cerr << "gprelhigh relocation offset " << idx << "\n");
DEBUG(std::cerr << " Pointer is " << (void*)MR->getResultPointer()
<< " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
DOUT << "gprelhigh relocation offset " << idx << "\n";
DOUT << " Pointer is " << (void*)MR->getResultPointer()
<< " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n";
break;
case Alpha::reloc_gpdist:
switch (*RelocPos >> 26) {
case 0x09: //LDAH
idx = &GOTBase[GOToffset * 8] - (unsigned char*)RelocPos;
idx = getUpper16(idx);
DEBUG(std::cerr << "LDAH: " << idx << "\n");
DOUT << "LDAH: " << idx << "\n";
//add the relocation to the map
gpdistmap[std::make_pair(Function, MR->getConstantVal())] = RelocPos;
break;
@ -283,7 +282,7 @@ void AlphaJITInfo::relocate(void *Function, MachineRelocation *MR,
idx = &GOTBase[GOToffset * 8] -
(unsigned char*)gpdistmap[std::make_pair(Function, MR->getConstantVal())];
idx = getLower16(idx);
DEBUG(std::cerr << "LDA: " << idx << "\n");
DOUT << "LDA: " << idx << "\n";
break;
default:
assert(0 && "Cannot handle gpdist yet");

33
lib/Target/Alpha/AlphaRegisterInfo.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
#include <iostream>
using namespace llvm;
//These describe LDAx
@ -63,8 +62,8 @@ AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const {
//std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to "
//<< FrameIdx << "\n";
//cerr << "Trying to store " << getPrettyName(SrcReg) << " to "
// << FrameIdx << "\n";
//BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
if (RC == Alpha::F4RCRegisterClass)
BuildMI(MBB, MI, TII.get(Alpha::STS))
@ -84,8 +83,8 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC) const {
//std::cerr << "Trying to load " << getPrettyName(DestReg) << " to "
//<< FrameIdx << "\n";
//cerr << "Trying to load " << getPrettyName(DestReg) << " to "
// << FrameIdx << "\n";
if (RC == Alpha::F4RCRegisterClass)
BuildMI(MBB, MI, TII.get(Alpha::LDS), DestReg)
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
@ -139,7 +138,7 @@ void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const {
// std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
//cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
if (RC == Alpha::GPRCRegisterClass) {
BuildMI(MBB, MI, TII.get(Alpha::BISr), DestReg).addReg(SrcReg).addReg(SrcReg);
} else if (RC == Alpha::F4RCRegisterClass) {
@ -147,8 +146,8 @@ void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
} else if (RC == Alpha::F8RCRegisterClass) {
BuildMI(MBB, MI, TII.get(Alpha::CPYST), DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
std::cerr << "Attempt to copy register that is not GPR or FPR";
abort();
cerr << "Attempt to copy register that is not GPR or FPR";
abort();
}
}
@ -255,16 +254,16 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
// Now add the frame object offset to the offset from the virtual frame index.
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
DOUT << "FI: " << FrameIndex << " Offset: " << Offset << "\n";
Offset += MF.getFrameInfo()->getStackSize();
DEBUG(std::cerr << "Corrected Offset " << Offset <<
" for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
DOUT << "Corrected Offset " << Offset
<< " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n";
if (Offset > IMM_HIGH || Offset < IMM_LOW) {
DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: "
<< Offset << "\n");
DOUT << "Unconditionally using R28 for evil purposes Offset: "
<< Offset << "\n";
//so in this case, we need to use a temporary register, and move the
//original inst off the SP/FP
//fix up the old:
@ -309,8 +308,8 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
// brackets around call sites.
//If there is a frame pointer, then we don't do this
NumBytes += MFI->getMaxCallFrameSize();
DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
<< " to the stack due to calls\n");
DOUT << "Added " << MFI->getMaxCallFrameSize()
<< " to the stack due to calls\n";
}
if (FP)
@ -336,7 +335,7 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, MBBI, TII.get(Alpha::LDA), Alpha::R30).addImm(getLower16(NumBytes))
.addReg(Alpha::R30);
} else {
std::cerr << "Too big a stack frame at " << NumBytes << "\n";
cerr << "Too big a stack frame at " << NumBytes << "\n";
abort();
}
@ -386,7 +385,7 @@ void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
BuildMI(MBB, MBBI, TII.get(Alpha::LDA), Alpha::R30)
.addImm(getLower16(NumBytes)).addReg(Alpha::R30);
} else {
std::cerr << "Too big a stack frame at " << NumBytes << "\n";
cerr << "Too big a stack frame at " << NumBytes << "\n";
abort();
}
}

20
lib/Target/CBackend/CBackend.cpp
View File

@ -42,9 +42,7 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/Config/config.h"
#include <algorithm>
#include <iostream>
#include <ios>
#include <sstream>
using namespace llvm;
namespace {
@ -229,7 +227,7 @@ namespace {
void visitVAArgInst (VAArgInst &I);
void visitInstruction(Instruction &I) {
std::cerr << "C Writer does not know about " << I;
cerr << "C Writer does not know about " << I;
abort();
}
@ -375,7 +373,7 @@ std::ostream &CWriter::printType(std::ostream &Out, const Type *Ty,
case Type::FloatTyID: return Out << "float " << NameSoFar;
case Type::DoubleTyID: return Out << "double " << NameSoFar;
default :
std::cerr << "Unknown primitive type: " << *Ty << "\n";
cerr << "Unknown primitive type: " << *Ty << "\n";
abort();
}
@ -726,8 +724,8 @@ void CWriter::printConstant(Constant *CPV) {
}
default:
std::cerr << "CWriter Error: Unhandled constant expression: "
<< *CE << "\n";
cerr << "CWriter Error: Unhandled constant expression: "
<< *CE << "\n";
abort();
}
} else if (isa<UndefValue>(CPV) && CPV->getType()->isFirstClassType()) {
@ -901,7 +899,7 @@ void CWriter::printConstant(Constant *CPV) {
}
// FALL THROUGH
default:
std::cerr << "Unknown constant type: " << *CPV << "\n";
cerr << "Unknown constant type: " << *CPV << "\n";
abort();
}
}
@ -1973,7 +1971,7 @@ void CWriter::visitBinaryOperator(Instruction &I) {
case Instruction::Shl : Out << " << "; break;
case Instruction::LShr:
case Instruction::AShr: Out << " >> "; break;
default: std::cerr << "Invalid operator type!" << I; abort();
default: cerr << "Invalid operator type!" << I; abort();
}
writeOperandWithCast(I.getOperand(1), I.getOpcode());
@ -2099,9 +2097,9 @@ void CWriter::visitCallInst(CallInst &I) {
Out << ", ";
// Output the last argument to the enclosing function...
if (I.getParent()->getParent()->arg_empty()) {
std::cerr << "The C backend does not currently support zero "
<< "argument varargs functions, such as '"
<< I.getParent()->getParent()->getName() << "'!\n";
cerr << "The C backend does not currently support zero "
<< "argument varargs functions, such as '"
<< I.getParent()->getParent()->getName() << "'!\n";
abort();
}
writeOperand(--I.getParent()->getParent()->arg_end());

20
lib/Target/CBackend/Writer.cpp
View File

@ -42,9 +42,7 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/Config/config.h"
#include <algorithm>
#include <iostream>
#include <ios>
#include <sstream>
using namespace llvm;
namespace {
@ -229,7 +227,7 @@ namespace {
void visitVAArgInst (VAArgInst &I);
void visitInstruction(Instruction &I) {
std::cerr << "C Writer does not know about " << I;
cerr << "C Writer does not know about " << I;
abort();
}
@ -375,7 +373,7 @@ std::ostream &CWriter::printType(std::ostream &Out, const Type *Ty,
case Type::FloatTyID: return Out << "float " << NameSoFar;
case Type::DoubleTyID: return Out << "double " << NameSoFar;
default :
std::cerr << "Unknown primitive type: " << *Ty << "\n";
cerr << "Unknown primitive type: " << *Ty << "\n";
abort();
}
@ -726,8 +724,8 @@ void CWriter::printConstant(Constant *CPV) {
}
default:
std::cerr << "CWriter Error: Unhandled constant expression: "
<< *CE << "\n";
cerr << "CWriter Error: Unhandled constant expression: "
<< *CE << "\n";
abort();
}
} else if (isa<UndefValue>(CPV) && CPV->getType()->isFirstClassType()) {
@ -901,7 +899,7 @@ void CWriter::printConstant(Constant *CPV) {
}
// FALL THROUGH
default:
std::cerr << "Unknown constant type: " << *CPV << "\n";
cerr << "Unknown constant type: " << *CPV << "\n";
abort();
}
}
@ -1973,7 +1971,7 @@ void CWriter::visitBinaryOperator(Instruction &I) {
case Instruction::Shl : Out << " << "; break;
case Instruction::LShr:
case Instruction::AShr: Out << " >> "; break;
default: std::cerr << "Invalid operator type!" << I; abort();
default: cerr << "Invalid operator type!" << I; abort();
}
writeOperandWithCast(I.getOperand(1), I.getOpcode());
@ -2099,9 +2097,9 @@ void CWriter::visitCallInst(CallInst &I) {
Out << ", ";
// Output the last argument to the enclosing function...
if (I.getParent()->getParent()->arg_empty()) {
std::cerr << "The C backend does not currently support zero "
<< "argument varargs functions, such as '"
<< I.getParent()->getParent()->getName() << "'!\n";
cerr << "The C backend does not currently support zero "
<< "argument varargs functions, such as '"
<< I.getParent()->getParent()->getName() << "'!\n";
abort();
}
writeOperand(--I.getParent()->getParent()->arg_end());

7
lib/Target/IA64/IA64AsmPrinter.cpp
View File

@ -26,7 +26,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
#include <iostream>
using namespace llvm;
namespace {
@ -308,13 +307,13 @@ bool IA64AsmPrinter::doFinalization(Module &M) {
SwitchToDataSection(C->isNullValue() ? ".bss" : ".data", I);
break;
case GlobalValue::GhostLinkage:
std::cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
abort();
case GlobalValue::DLLImportLinkage:
std::cerr << "DLLImport linkage is not supported by this target!\n";
cerr << "DLLImport linkage is not supported by this target!\n";
abort();
case GlobalValue::DLLExportLinkage:
std::cerr << "DLLExport linkage is not supported by this target!\n";
cerr << "DLLExport linkage is not supported by this target!\n";
abort();
default:
assert(0 && "Unknown linkage type!");

1
lib/Target/IA64/IA64Bundling.cpp
View File

@ -29,7 +29,6 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
#include <set>
#include <iostream>
using namespace llvm;
namespace {

1
lib/Target/IA64/IA64ISelDAGToDAG.cpp
View File

@ -27,7 +27,6 @@
#include "llvm/Intrinsics.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include <iostream>
#include <queue>
#include <set>
using namespace llvm;

2
lib/Target/IA64/IA64RegisterInfo.cpp
View File

@ -29,10 +29,8 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/ADT/STLExtras.h"
#include <iostream>
using namespace llvm;
IA64RegisterInfo::IA64RegisterInfo(const TargetInstrInfo &tii)
: IA64GenRegisterInfo(IA64::ADJUSTCALLSTACKDOWN, IA64::ADJUSTCALLSTACKUP),
TII(tii) {}

5
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -41,7 +41,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include <iostream>
#include <set>
using namespace llvm;
@ -295,7 +294,7 @@ namespace {
void PPCAsmPrinter::printOp(const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_Immediate:
std::cerr << "printOp() does not handle immediate values\n";
cerr << "printOp() does not handle immediate values\n";
abort();
return;
@ -629,7 +628,7 @@ bool DarwinAsmPrinter::doFinalization(Module &M) {
SwitchToDataSection("\t.data", I);
break;
default:
std::cerr << "Unknown linkage type!";
cerr << "Unknown linkage type!";
abort();
}

3
lib/Target/PowerPC/PPCCodeEmitter.cpp
View File

@ -24,7 +24,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Target/TargetOptions.h"
#include <iostream>
using namespace llvm;
namespace {
@ -193,7 +192,7 @@ int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
Reloc,
MO.getMachineBasicBlock()));
} else {
std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();
}

4
lib/Target/PowerPC/PPCHazardRecognizers.cpp
View File

@ -16,10 +16,8 @@
#include "PPC.h"
#include "PPCInstrInfo.h"
#include "llvm/Support/Debug.h"
#include <iostream>
using namespace llvm;
//===----------------------------------------------------------------------===//
// PowerPC 970 Hazard Recognizer
//
@ -52,7 +50,7 @@ PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii)
}
void PPCHazardRecognizer970::EndDispatchGroup() {
DEBUG(std::cerr << "=== Start of dispatch group\n");
DOUT << "=== Start of dispatch group\n";
NumIssued = 0;
// Structural hazard info.

1
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Compiler.h"
#include <iostream>
#include <queue>
#include <set>
using namespace llvm;

1
lib/Target/PowerPC/PPCInstrInfo.cpp
View File

@ -16,7 +16,6 @@
#include "PPCGenInstrInfo.inc"
#include "PPCTargetMachine.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include <iostream>
using namespace llvm;
PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)

1
lib/Target/PowerPC/PPCJITInfo.cpp
View File

@ -18,7 +18,6 @@
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include <set>
#include <iostream>
using namespace llvm;
static TargetJITInfo::JITCompilerFn JITCompilerFunction;

5
lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -36,7 +36,6 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
#include <iostream>
using namespace llvm;
/// getRegisterNumbering - Given the enum value for some register, e.g.
@ -77,7 +76,7 @@ unsigned PPCRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
case R30: case X30: case F30: case V30: return 30;
case R31: case X31: case F31: case V31: return 31;
default:
std::cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
abort();
}
}
@ -234,7 +233,7 @@ void PPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
} else if (RC == PPC::VRRCRegisterClass) {
BuildMI(MBB, MI, TII.get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
std::cerr << "Attempt to copy register that is not GPR or FPR";
cerr << "Attempt to copy register that is not GPR or FPR";
abort();
}
}

9
lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -15,7 +15,6 @@
#include "PPC.h"
#include "llvm/Module.h"
#include "PPCGenSubtarget.inc"
#include <iostream>
using namespace llvm;
#if defined(__APPLE__)
@ -80,8 +79,8 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {
if (!has64BitSupport()) {
std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
"requested. Ignoring 32-bit processor feature.\n";
cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
<< "requested. Ignoring 32-bit processor feature.\n";
Has64BitSupport = true;
}
// Silently force 64-bit register use on ppc64.
@ -91,8 +90,8 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
// If the user requested use of 64-bit regs, but the cpu selected doesn't
// support it, warn and ignore.
if (use64BitRegs() && !has64BitSupport()) {
std::cerr << "PPC: 64-bit registers requested on CPU without support. "
"Disabling 64-bit register use.\n";
cerr << "PPC: 64-bit registers requested on CPU without support. "
<< "Disabling 64-bit register use.\n";
Use64BitRegs = false;
}

5
lib/Target/Sparc/FPMover.cpp
View File

@ -19,7 +19,6 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
#include <iostream>
using namespace llvm;
namespace {
@ -108,12 +107,12 @@ bool FPMover::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
MI->getOperand(0).setReg(EvenDestReg);
MI->getOperand(1).setReg(EvenSrcReg);
DEBUG(std::cerr << "FPMover: the modified instr is: " << *MI);
DOUT << "FPMover: the modified instr is: " << *MI;
// Insert copy for the other half of the double.
if (DestDReg != SrcDReg) {
MI = BuildMI(MBB, I, TM.getInstrInfo()->get(SP::FMOVS), OddDestReg)
.addReg(OddSrcReg);
DEBUG(std::cerr << "FPMover: the inserted instr is: " << *MI);
DOUT << "FPMover: the inserted instr is: " << *MI;
}
++NumFpDs;
}

7
lib/Target/Sparc/SparcAsmPrinter.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/MathExtras.h"
#include <cctype>
#include <iostream>
using namespace llvm;
namespace {
@ -266,13 +265,13 @@ bool SparcAsmPrinter::doFinalization(Module &M) {
SwitchToDataSection(".data", I);
break;
case GlobalValue::GhostLinkage:
std::cerr << "Should not have any unmaterialized functions!\n";
cerr << "Should not have any unmaterialized functions!\n";
abort();
case GlobalValue::DLLImportLinkage:
std::cerr << "DLLImport linkage is not supported by this target!\n";
cerr << "DLLImport linkage is not supported by this target!\n";
abort();
case GlobalValue::DLLExportLinkage:
std::cerr << "DLLExport linkage is not supported by this target!\n";
cerr << "DLLExport linkage is not supported by this target!\n";
abort();
default:
assert(0 && "Unknown linkage type!");

1
lib/Target/Sparc/SparcISelDAGToDAG.cpp
View File

@ -24,7 +24,6 @@
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Debug.h"
#include <iostream>
#include <queue>
#include <set>
using namespace llvm;

1
lib/Target/Sparc/SparcRegisterInfo.cpp
View File

@ -21,7 +21,6 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Type.h"
#include "llvm/ADT/STLExtras.h"
#include <iostream>
using namespace llvm;
SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st,

1
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -16,7 +16,6 @@
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include <iostream>
using namespace llvm;
namespace {

52
lib/Target/SubtargetFeature.cpp
View File

@ -13,10 +13,10 @@
#include "llvm/Target/SubtargetFeature.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Streams.h"
#include <algorithm>
#include <cassert>
#include <cctype>
#include <iostream>
using namespace llvm;
//===----------------------------------------------------------------------===//
@ -144,23 +144,23 @@ static void Help(const SubtargetFeatureKV *CPUTable, size_t CPUTableSize,
unsigned MaxFeatLen = getLongestEntryLength(FeatTable, FeatTableSize);
// Print the CPU table.
std::cerr << "Available CPUs for this target:\n\n";
cerr << "Available CPUs for this target:\n\n";
for (size_t i = 0; i != CPUTableSize; i++)
std::cerr << " " << CPUTable[i].Key
<< std::string(MaxCPULen - std::strlen(CPUTable[i].Key), ' ')
<< " - " << CPUTable[i].Desc << ".\n";
std::cerr << "\n";
cerr << " " << CPUTable[i].Key
<< std::string(MaxCPULen - std::strlen(CPUTable[i].Key), ' ')
<< " - " << CPUTable[i].Desc << ".\n";
cerr << "\n";
// Print the Feature table.
std::cerr << "Available features for this target:\n\n";
cerr << "Available features for this target:\n\n";
for (size_t i = 0; i != FeatTableSize; i++)
std::cerr << " " << FeatTable[i].Key
<< std::string(MaxFeatLen - std::strlen(FeatTable[i].Key), ' ')
<< " - " << FeatTable[i].Desc << ".\n";
std::cerr << "\n";
cerr << " " << FeatTable[i].Key
<< std::string(MaxFeatLen - std::strlen(FeatTable[i].Key), ' ')
<< " - " << FeatTable[i].Desc << ".\n";
cerr << "\n";
std::cerr << "Use +feature to enable a feature, or -feature to disable it.\n"
<< "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
cerr << "Use +feature to enable a feature, or -feature to disable it.\n"
<< "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
exit(1);
}
@ -231,10 +231,10 @@ uint32_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
// Set base feature bits
Bits = CPUEntry->Value;
} else {
std::cerr << "'" << Features[0]
<< "' is not a recognized processor for this target"
<< " (ignoring processor)"
<< "\n";
cerr << "'" << Features[0]
<< "' is not a recognized processor for this target"
<< " (ignoring processor)"
<< "\n";
}
// Iterate through each feature
for (size_t i = 1; i < Features.size(); i++) {
@ -253,10 +253,10 @@ uint32_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
if (isEnabled(Feature)) Bits |= FeatureEntry->Value;
else Bits &= ~FeatureEntry->Value;
} else {
std::cerr << "'" << Feature
<< "' is not a recognized feature for this target"
<< " (ignoring feature)"
<< "\n";
cerr << "'" << Feature
<< "' is not a recognized feature for this target"
<< " (ignoring feature)"
<< "\n";
}
}
return Bits;
@ -278,10 +278,10 @@ void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
if (Entry) {
return Entry->Value;
} else {
std::cerr << "'" << Features[0]
<< "' is not a recognized processor for this target"
<< " (ignoring processor)"
<< "\n";
cerr << "'" << Features[0]
<< "' is not a recognized processor for this target"
<< " (ignoring processor)"
<< "\n";
return NULL;
}
}
@ -298,5 +298,5 @@ void SubtargetFeatures::print(std::ostream &OS) const {
/// dump - Dump feature info.
///
void SubtargetFeatures::dump() const {
print(std::cerr);
print(*cerr.stream());
}

17
lib/Target/X86/X86FloatingPoint.cpp
View File

@ -44,7 +44,6 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
#include <iostream>
#include <set>
using namespace llvm;
@ -70,12 +69,12 @@ namespace {
unsigned StackTop; // The current top of the FP stack.
void dumpStack() const {
std::cerr << "Stack contents:";
cerr << "Stack contents:";
for (unsigned i = 0; i != StackTop; ++i) {
std::cerr << " FP" << Stack[i];
cerr << " FP" << Stack[i];
assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!");
}
std::cerr << "\n";
cerr << "\n";
}
private:
// getSlot - Return the stack slot number a particular register number is
@ -211,7 +210,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t"; MI->print(std::cerr, &(MF.getTarget())));
DOUT << "\nFPInst:\t"; MI->print(*cerr.stream(), &(MF.getTarget()));
// Get dead variables list now because the MI pointer may be deleted as part
// of processing!
@ -238,7 +237,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
for (unsigned i = 0, e = DeadRegs.size(); i != e; ++i) {
unsigned Reg = DeadRegs[i];
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
DOUT << "Register FP#" << Reg-X86::FP0 << " is dead!\n";
freeStackSlotAfter(I, Reg-X86::FP0);
}
}
@ -247,13 +246,13 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
DEBUG(
MachineBasicBlock::iterator PrevI(PrevMI);
if (I == PrevI) {
std::cerr << "Just deleted pseudo instruction\n";
cerr << "Just deleted pseudo instruction\n";
} else {
MachineBasicBlock::iterator Start = I;
// Rewind to first instruction newly inserted.
while (Start != BB.begin() && prior(Start) != PrevI) --Start;
std::cerr << "Inserted instructions:\n\t";
Start->print(std::cerr, &MF.getTarget());
cerr << "Inserted instructions:\n\t";
Start->print(*cerr.stream(), &MF.getTarget());
while (++Start != next(I));
}
dumpStack();

1
lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -34,7 +34,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/ADT/Statistic.h"
#include <iostream>
#include <queue>
#include <set>
using namespace llvm;

10
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -32,8 +32,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/ADT/STLExtras.h"
#include <iostream>
using namespace llvm;
namespace {
@ -244,8 +242,8 @@ namespace {
static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
for (unsigned i = 1; i != NumEntries; ++i)
if (!(Table[i-1] < Table[i])) {
std::cerr << "Entries out of order " << Table[i-1].from
<< " " << Table[i].from << "\n";
cerr << "Entries out of order " << Table[i-1].from
<< " " << Table[i].from << "\n";
return false;
}
return true;
@ -845,8 +843,8 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI,
// No fusion
if (PrintFailedFusing)
std::cerr << "We failed to fuse ("
<< ((i == 1) ? "r" : "s") << "): " << *MI;
cerr << "We failed to fuse ("
<< ((i == 1) ? "r" : "s") << "): " << *MI;
return NULL;
}

7
lib/Target/X86/X86Subtarget.cpp
View File

@ -15,7 +15,6 @@
#include "X86GenSubtarget.inc"
#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
#include <iostream>
using namespace llvm;
cl::opt<X86Subtarget::AsmWriterFlavorTy>
@ -224,10 +223,10 @@ X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
ParseSubtargetFeatures(FS, CPU);
if (Is64Bit && !HasX86_64)
std::cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
"requested.\n";
cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
<< "requested.\n";
if (Is64Bit && X86SSELevel < SSE2)
std::cerr << "Warning: 64-bit processors all have at least SSE2.\n";
cerr << "Warning: 64-bit processors all have at least SSE2.\n";
} else {
// Otherwise, use CPUID to auto-detect feature set.
AutoDetectSubtargetFeatures();

11
lib/Transforms/IPO/FunctionResolution.cpp
View File

@ -29,7 +29,6 @@
#include "llvm/Assembly/Writer.h"
#include "llvm/ADT/Statistic.h"
#include <algorithm>
#include <iostream>
using namespace llvm;
namespace {
@ -65,9 +64,9 @@ static bool ResolveFunctions(Module &M, std::vector<GlobalValue*> &Globals,
cerr << "WARNING: Linking function '" << Old->getName()
<< "' is causing arguments to be dropped.\n";
cerr << "WARNING: Prototype: ";
WriteAsOperand(std::cerr, Old);
WriteAsOperand(*cerr.stream(), Old);
cerr << " resolved to ";
WriteAsOperand(std::cerr, Concrete);
WriteAsOperand(*cerr.stream(), Concrete);
cerr << "\n";
}
@ -84,10 +83,10 @@ static bool ResolveFunctions(Module &M, std::vector<GlobalValue*> &Globals,
ConcreteFT->getParamType(i)->getTypeID()) {
cerr << "WARNING: Function [" << Old->getName()
<< "]: Parameter types conflict for: '";
WriteTypeSymbolic(std::cerr, OldFT, &M);
WriteTypeSymbolic(*cerr.stream(), OldFT, &M);
cerr << "' (in "
<< Old->getParent()->getModuleIdentifier() << ") and '";
WriteTypeSymbolic(std::cerr, ConcreteFT, &M);
WriteTypeSymbolic(*cerr.stream(), ConcreteFT, &M);
cerr << "'(in "
<< Concrete->getParent()->getModuleIdentifier() << ")\n";
return Changed;
@ -254,7 +253,7 @@ static bool ProcessGlobalsWithSameName(Module &M, TargetData &TD,
cerr << "WARNING: Found global types that are not compatible:\n";
for (unsigned i = 0; i < Globals.size(); ++i) {
cerr << "\t";
WriteTypeSymbolic(std::cerr, Globals[i]->getType(), &M);
WriteTypeSymbolic(*cerr.stream(), Globals[i]->getType(), &M);
cerr << " %" << Globals[i]->getName() << "\n";
}
}

5
utils/TableGen/AsmWriterEmitter.cpp
View File

@ -19,7 +19,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <ostream>
using namespace llvm;
static bool isIdentChar(char C) {
@ -551,8 +550,8 @@ void AsmWriterEmitter::run(std::ostream &O) {
// If we don't have enough bits for this operand, don't include it.
if (NumBits > BitsLeft) {
DEBUG(std::cerr << "Not enough bits to densely encode " << NumBits
<< " more bits\n");
DOUT << "Not enough bits to densely encode " << NumBits
<< " more bits\n";
break;
}

2
utils/TableGen/CodeEmitterGen.cpp
View File

@ -214,7 +214,7 @@ void CodeEmitterGen::run(std::ostream &o) {
// Default case: unhandled opcode
o << " default:\n"
<< " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
<< " cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
<< " abort();\n"
<< " }\n"
<< " return Value;\n"

5
utils/TableGen/CodeGenTarget.cpp
View File

@ -19,6 +19,7 @@
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Streams.h"
#include <set>
#include <algorithm>
using namespace llvm;
@ -527,8 +528,8 @@ ComplexPattern::ComplexPattern(Record *R) {
} else if (PropList[i]->getName() == "SDNPOptInFlag") {
Properties |= 1 << SDNPOptInFlag;
} else {
std::cerr << "Unsupported SD Node property '" << PropList[i]->getName()
<< "' on ComplexPattern '" << R->getName() << "'!\n";
cerr << "Unsupported SD Node property '" << PropList[i]->getName()
<< "' on ComplexPattern '" << R->getName() << "'!\n";
exit(1);
}
}

89
utils/TableGen/DAGISelEmitter.cpp
View File

@ -16,6 +16,7 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
#include <algorithm>
#include <set>
using namespace llvm;
@ -109,7 +110,7 @@ SDTypeConstraint::SDTypeConstraint(Record *R) {
x.SDTCisIntVectorOfSameSize_Info.OtherOperandNum =
R->getValueAsInt("OtherOpNum");
} else {
std::cerr << "Unrecognized SDTypeConstraint '" << R->getName() << "'!\n";
cerr << "Unrecognized SDTypeConstraint '" << R->getName() << "'!\n";
exit(1);
}
}
@ -123,9 +124,9 @@ TreePatternNode *SDTypeConstraint::getOperandNum(unsigned OpNo,
"We only work with nodes with zero or one result so far!");
if (OpNo >= (NumResults + N->getNumChildren())) {
std::cerr << "Invalid operand number " << OpNo << " ";
cerr << "Invalid operand number " << OpNo << " ";
N->dump();
std::cerr << '\n';
cerr << '\n';
exit(1);
}
@ -316,8 +317,8 @@ SDNodeInfo::SDNodeInfo(Record *R) : Def(R) {
} else if (PropList[i]->getName() == "SDNPOptInFlag") {
Properties |= 1 << SDNPOptInFlag;
} else {
std::cerr << "Unknown SD Node property '" << PropList[i]->getName()
<< "' on node '" << R->getName() << "'!\n";
cerr << "Unknown SD Node property '" << PropList[i]->getName()
<< "' on node '" << R->getName() << "'!\n";
exit(1);
}
}
@ -412,7 +413,7 @@ bool TreePatternNode::UpdateNodeType(const std::vector<unsigned char> &ExtVTs,
if (isLeaf()) {
dump();
std::cerr << " ";
cerr << " ";
TP.error("Type inference contradiction found in node!");
} else {
TP.error("Type inference contradiction found in node " +
@ -468,7 +469,7 @@ void TreePatternNode::print(std::ostream &OS) const {
}
void TreePatternNode::dump() const {
print(std::cerr);
print(*cerr.stream());
}
/// isIsomorphicTo - Return true if this node is recursively isomorphic to
@ -1009,9 +1010,9 @@ TreePatternNode *TreePattern::ParseTreePattern(DagInit *Dag) {
error("Constant int argument should not have a name!");
Children.push_back(Node);
} else {
std::cerr << '"';
cerr << '"';
Arg->dump();
std::cerr << "\": ";
cerr << "\": ";
error("Unknown leaf value for tree pattern!");
}
}
@ -1081,7 +1082,7 @@ void TreePattern::print(std::ostream &OS) const {
OS << "]\n";
}
void TreePattern::dump() const { print(std::cerr); }
void TreePattern::dump() const { print(*cerr.stream()); }
@ -1622,7 +1623,7 @@ void DAGISelEmitter::ParseInstructions() {
if (I == 0) continue; // No pattern.
if (I->getNumTrees() != 1) {
std::cerr << "CANNOT HANDLE: " << I->getRecord()->getName() << " yet!";
cerr << "CANNOT HANDLE: " << I->getRecord()->getName() << " yet!";
continue;
}
TreePatternNode *Pattern = I->getTree(0);
@ -1949,7 +1950,7 @@ static void GenerateVariantsOf(TreePatternNode *N,
// match multiple ways. Add them to PatternsToMatch as well.
void DAGISelEmitter::GenerateVariants() {
DEBUG(std::cerr << "Generating instruction variants.\n");
DOUT << "Generating instruction variants.\n";
// Loop over all of the patterns we've collected, checking to see if we can
// generate variants of the instruction, through the exploitation of
@ -1970,23 +1971,23 @@ void DAGISelEmitter::GenerateVariants() {
if (Variants.empty()) // No variants for this pattern.
continue;
DEBUG(std::cerr << "FOUND VARIANTS OF: ";
PatternsToMatch[i].getSrcPattern()->dump();
std::cerr << "\n");
DOUT << "FOUND VARIANTS OF: ";
DEBUG(PatternsToMatch[i].getSrcPattern()->dump());
DOUT << "\n";
for (unsigned v = 0, e = Variants.size(); v != e; ++v) {
TreePatternNode *Variant = Variants[v];
DEBUG(std::cerr << " VAR#" << v << ": ";
Variant->dump();
std::cerr << "\n");
DOUT << " VAR#" << v << ": ";
DEBUG(Variant->dump());
DOUT << "\n";
// Scan to see if an instruction or explicit pattern already matches this.
bool AlreadyExists = false;
for (unsigned p = 0, e = PatternsToMatch.size(); p != e; ++p) {
// Check to see if this variant already exists.
if (Variant->isIsomorphicTo(PatternsToMatch[p].getSrcPattern())) {
DEBUG(std::cerr << " *** ALREADY EXISTS, ignoring variant.\n");
DOUT << " *** ALREADY EXISTS, ignoring variant.\n";
AlreadyExists = true;
break;
}
@ -2001,7 +2002,7 @@ void DAGISelEmitter::GenerateVariants() {
PatternsToMatch[i].getAddedComplexity()));
}
DEBUG(std::cerr << "\n");
DOUT << "\n";
}
}
@ -2160,7 +2161,7 @@ static void RemoveAllTypes(TreePatternNode *N) {
Record *DAGISelEmitter::getSDNodeNamed(const std::string &Name) const {
Record *N = Records.getDef(Name);
if (!N || !N->isSubClassOf("SDNode")) {
std::cerr << "Error getting SDNode '" << Name << "'!\n";
cerr << "Error getting SDNode '" << Name << "'!\n";
exit(1);
}
return N;
@ -2569,7 +2570,7 @@ public:
} else {
#ifndef NDEBUG
Child->dump();
std::cerr << " ";
cerr << " ";
#endif
assert(0 && "Unknown leaf type!");
}
@ -3068,7 +3069,7 @@ public:
return NodeOps;
} else {
N->dump();
std::cerr << "\n";
cerr << "\n";
throw std::string("Unknown node in result pattern!");
}
}
@ -3443,12 +3444,11 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
&PatternsToMatch[i]);
}
} else {
std::cerr << "Unrecognized opcode '";
cerr << "Unrecognized opcode '";
Node->dump();
std::cerr << "' on tree pattern '";
std::cerr <<
PatternsToMatch[i].getDstPattern()->getOperator()->getName();
std::cerr << "'!\n";
cerr << "' on tree pattern '";
cerr << PatternsToMatch[i].getDstPattern()->getOperator()->getName();
cerr << "'!\n";
exit(1);
}
}
@ -3534,9 +3534,9 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
// If this pattern definitely matches, and if it isn't the last one, the
// patterns after it CANNOT ever match. Error out.
if (mightNotMatch == false && i != CodeForPatterns.size()-1) {
std::cerr << "Pattern '";
CodeForPatterns[i].first->getSrcPattern()->print(std::cerr);
std::cerr << "' is impossible to select!\n";
cerr << "Pattern '";
CodeForPatterns[i].first->getSrcPattern()->print(*cerr.stream());
cerr << "' is impossible to select!\n";
exit(1);
}
}
@ -3650,7 +3650,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
// If the last pattern has predicates (which could fail) emit code to
// catch the case where nothing handles a pattern.
if (mightNotMatch) {
OS << " std::cerr << \"Cannot yet select: \";\n";
OS << " cerr << \"Cannot yet select: \";\n";
if (OpName != "ISD::INTRINSIC_W_CHAIN" &&
OpName != "ISD::INTRINSIC_WO_CHAIN" &&
OpName != "ISD::INTRINSIC_VOID") {
@ -3658,10 +3658,10 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
} else {
OS << " unsigned iid = cast<ConstantSDNode>(N.getOperand("
"N.getOperand(0).getValueType() == MVT::Other))->getValue();\n"
<< " std::cerr << \"intrinsic %\"<< "
<< " cerr << \"intrinsic %\"<< "
"Intrinsic::getName((Intrinsic::ID)iid);\n";
}
OS << " std::cerr << '\\n';\n"
OS << " cerr << '\\n';\n"
<< " abort();\n"
<< " return NULL;\n";
}
@ -3780,7 +3780,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
}
OS << " } // end of big switch.\n\n"
<< " std::cerr << \"Cannot yet select: \";\n"
<< " cerr << \"Cannot yet select: \";\n"
<< " if (N.getOpcode() != ISD::INTRINSIC_W_CHAIN &&\n"
<< " N.getOpcode() != ISD::INTRINSIC_WO_CHAIN &&\n"
<< " N.getOpcode() != ISD::INTRINSIC_VOID) {\n"
@ -3788,10 +3788,10 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
<< " } else {\n"
<< " unsigned iid = cast<ConstantSDNode>(N.getOperand("
"N.getOperand(0).getValueType() == MVT::Other))->getValue();\n"
<< " std::cerr << \"intrinsic %\"<< "
"Intrinsic::getName((Intrinsic::ID)iid);\n"
<< " cerr << \"intrinsic %\"<< "
"Intrinsic::getName((Intrinsic::ID)iid);\n"
<< " }\n"
<< " std::cerr << '\\n';\n"
<< " cerr << '\\n';\n"
<< " abort();\n"
<< " return NULL;\n"
<< "}\n";
@ -3937,13 +3937,12 @@ OS << " unsigned NumKilled = ISelKilled.size();\n";
// multiple ways. Add them to PatternsToMatch as well.
GenerateVariants();
DEBUG(std::cerr << "\n\nALL PATTERNS TO MATCH:\n\n";
for (unsigned i = 0, e = PatternsToMatch.size(); i != e; ++i) {
std::cerr << "PATTERN: "; PatternsToMatch[i].getSrcPattern()->dump();
std::cerr << "\nRESULT: ";PatternsToMatch[i].getDstPattern()->dump();
std::cerr << "\n";
});
DOUT << "\n\nALL PATTERNS TO MATCH:\n\n";
for (unsigned i = 0, e = PatternsToMatch.size(); i != e; ++i) {
DOUT << "PATTERN: "; DEBUG(PatternsToMatch[i].getSrcPattern()->dump());
DOUT << "\nRESULT: "; DEBUG(PatternsToMatch[i].getDstPattern()->dump());
DOUT << "\n";
}
// At this point, we have full information about the 'Patterns' we need to
// parse, both implicitly from instructions as well as from explicit pattern

106
utils/TableGen/FileLexer.cpp.cvs
View File

@ -501,7 +501,7 @@ goto find_rule; \
#define YY_MORE_ADJ 0
#define YY_RESTORE_YY_MORE_OFFSET
char *yytext;
#line 1 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 1 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
#define INITIAL 0
/*===-- FileLexer.l - Scanner for TableGen Files ----------------*- C++ -*-===//
//
@ -519,8 +519,9 @@ char *yytext;
#define YY_NEVER_INTERACTIVE 1
#define comment 1
#line 30 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 30 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
#include "llvm/Config/config.h"
#include "llvm/Support/Streams.h"
#include "Record.h"
typedef std::pair<llvm::Record*, std::vector<llvm::Init*>*> SubClassRefTy;
#include "FileParser.h"
@ -556,14 +557,17 @@ struct IncludeRec {
static std::vector<IncludeRec> IncludeStack;
std::ostream &err() {
if (IncludeStack.empty())
return std::cerr << "At end of input: ";
if (IncludeStack.empty()) {
cerr << "At end of input: ";
return *cerr.stream();
}
for (unsigned i = 0, e = IncludeStack.size()-1; i != e; ++i)
std::cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
return std::cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
return *cerr.stream();
}
/// ParseFile - this function begins the parsing of the specified tablegen file.
@ -575,7 +579,7 @@ void ParseFile(const std::string &Filename,
F = fopen(Filename.c_str(), "r");
if (F == 0) {
std::cerr << "Could not open input file '" + Filename + "'!\n";
cerr << "Could not open input file '" + Filename + "'!\n";
exit (1);
}
IncludeStack.push_back(IncludeRec(Filename, F));
@ -607,7 +611,7 @@ static void HandleInclude(const char *Buffer) {
}
assert(Length >= 2 && "Double quotes not found?");
std::string Filename(Buffer+1, Buffer+Length-1);
//std::cerr << "Filename = '" << Filename << "'\n";
//cerr << "Filename = '" << Filename << "'\n";
// Save the line number and lex buffer of the includer...
IncludeStack.back().LineNo = Filelineno;
@ -661,7 +665,7 @@ int yywrap(void) {
using namespace llvm;
#line 665 "Lexer.cpp"
#line 669 "Lexer.cpp"
/* Macros after this point can all be overridden by user definitions in
* section 1.
@ -812,10 +816,10 @@ YY_DECL
register char *yy_cp, *yy_bp;
register int yy_act;
#line 181 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 185 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
#line 819 "Lexer.cpp"
#line 823 "Lexer.cpp"
if ( yy_init )
{
@ -908,183 +912,183 @@ do_action: /* This label is used only to access EOF actions. */
{ /* beginning of action switch */
case 1:
YY_RULE_SETUP
#line 183 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 187 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ /* Ignore comments */ }
YY_BREAK
case 2:
YY_RULE_SETUP
#line 185 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 189 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ HandleInclude(yytext); }
YY_BREAK
case 3:
YY_RULE_SETUP
#line 186 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 190 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ Filelval.StrVal = new std::string(yytext+2, yytext+yyleng-2);
return CODEFRAGMENT; }
YY_BREAK
case 4:
YY_RULE_SETUP
#line 189 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 193 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return INT; }
YY_BREAK
case 5:
YY_RULE_SETUP
#line 190 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 194 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return BIT; }
YY_BREAK
case 6:
YY_RULE_SETUP
#line 191 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 195 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return BITS; }
YY_BREAK
case 7:
YY_RULE_SETUP
#line 192 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 196 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return STRING; }
YY_BREAK
case 8:
YY_RULE_SETUP
#line 193 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 197 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return LIST; }
YY_BREAK
case 9:
YY_RULE_SETUP
#line 194 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 198 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return CODE; }
YY_BREAK
case 10:
YY_RULE_SETUP
#line 195 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 199 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return DAG; }
YY_BREAK
case 11:
YY_RULE_SETUP
#line 197 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 201 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return CLASS; }
YY_BREAK
case 12:
YY_RULE_SETUP
#line 198 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 202 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return DEF; }
YY_BREAK
case 13:
YY_RULE_SETUP
#line 199 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 203 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return DEFM; }
YY_BREAK
case 14:
YY_RULE_SETUP
#line 200 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 204 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return MULTICLASS; }
YY_BREAK
case 15:
YY_RULE_SETUP
#line 201 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 205 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return FIELD; }
YY_BREAK
case 16:
YY_RULE_SETUP
#line 202 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 206 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return LET; }
YY_BREAK
case 17:
YY_RULE_SETUP
#line 203 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 207 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return IN; }
YY_BREAK
case 18:
YY_RULE_SETUP
#line 205 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 209 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return SRATOK; }
YY_BREAK
case 19:
YY_RULE_SETUP
#line 206 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 210 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return SRLTOK; }
YY_BREAK
case 20:
YY_RULE_SETUP
#line 207 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 211 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return SHLTOK; }
YY_BREAK
case 21:
YY_RULE_SETUP
#line 208 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 212 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return STRCONCATTOK; }
YY_BREAK
case 22:
YY_RULE_SETUP
#line 211 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 215 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ Filelval.StrVal = new std::string(yytext, yytext+yyleng);
return ID; }
YY_BREAK
case 23:
YY_RULE_SETUP
#line 213 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 217 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ Filelval.StrVal = new std::string(yytext+1, yytext+yyleng);
return VARNAME; }
YY_BREAK
case 24:
YY_RULE_SETUP
#line 216 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 220 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ Filelval.StrVal = new std::string(yytext+1, yytext+yyleng-1);
return STRVAL; }
YY_BREAK
case 25:
YY_RULE_SETUP
#line 219 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 223 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ Filelval.IntVal = ParseInt(Filetext); return INTVAL; }
YY_BREAK
case 26:
YY_RULE_SETUP
#line 221 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 225 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ /* Ignore whitespace */ }
YY_BREAK
case 27:
YY_RULE_SETUP
#line 224 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 228 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ BEGIN(comment); CommentDepth++; }
YY_BREAK
case 28:
YY_RULE_SETUP
#line 225 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 229 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{} /* eat anything that's not a '*' or '/' */
YY_BREAK
case 29:
YY_RULE_SETUP
#line 226 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 230 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{} /* eat up '*'s not followed by '/'s */
YY_BREAK
case 30:
YY_RULE_SETUP
#line 227 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 231 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ ++CommentDepth; }
YY_BREAK
case 31:
YY_RULE_SETUP
#line 228 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 232 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{} /* eat up /'s not followed by *'s */
YY_BREAK
case 32:
YY_RULE_SETUP
#line 229 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 233 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ if (!--CommentDepth) { BEGIN(INITIAL); } }
YY_BREAK
case YY_STATE_EOF(comment):
#line 230 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 234 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ err() << "Unterminated comment!\n"; exit(1); }
YY_BREAK
case 33:
YY_RULE_SETUP
#line 232 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 236 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
{ return Filetext[0]; }
YY_BREAK
case 34:
YY_RULE_SETUP
#line 234 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 238 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"
YY_FATAL_ERROR( "flex scanner jammed" );
YY_BREAK
#line 1088 "Lexer.cpp"
#line 1092 "Lexer.cpp"
case YY_STATE_EOF(INITIAL):
yyterminate();
@ -1508,7 +1512,7 @@ static int input()
case EOB_ACT_END_OF_FILE:
{
if ( yywrap() )
return EOF;
return 0;
if ( ! yy_did_buffer_switch_on_eof )
YY_NEW_FILE;
@ -1968,6 +1972,6 @@ int main()
return 0;
}
#endif
#line 234 "/Users/sabre/cvs/llvm/utils/TableGen/FileLexer.l"
#line 238 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileLexer.l"

20
utils/TableGen/FileLexer.l
View File

@ -28,6 +28,7 @@
%{
#include "llvm/Config/config.h"
#include "llvm/Support/Streams.h"
#include "Record.h"
typedef std::pair<llvm::Record*, std::vector<llvm::Init*>*> SubClassRefTy;
#include "FileParser.h"
@ -63,14 +64,17 @@ struct IncludeRec {
static std::vector<IncludeRec> IncludeStack;
std::ostream &err() {
if (IncludeStack.empty())
return std::cerr << "At end of input: ";
if (IncludeStack.empty()) {
cerr << "At end of input: ";
return *cerr.stream();
}
for (unsigned i = 0, e = IncludeStack.size()-1; i != e; ++i)
std::cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
return std::cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
return *cerr.stream();
}
/// ParseFile - this function begins the parsing of the specified tablegen file.
@ -82,7 +86,7 @@ void ParseFile(const std::string &Filename,
F = fopen(Filename.c_str(), "r");
if (F == 0) {
std::cerr << "Could not open input file '" + Filename + "'!\n";
cerr << "Could not open input file '" + Filename + "'!\n";
exit (1);
}
IncludeStack.push_back(IncludeRec(Filename, F));
@ -114,7 +118,7 @@ static void HandleInclude(const char *Buffer) {
}
assert(Length >= 2 && "Double quotes not found?");
std::string Filename(Buffer+1, Buffer+Length-1);
//std::cerr << "Filename = '" << Filename << "'\n";
//cerr << "Filename = '" << Filename << "'\n";
// Save the line number and lex buffer of the includer...
IncludeStack.back().LineNo = Filelineno;

20
utils/TableGen/FileLexer.l.cvs
View File

@ -28,6 +28,7 @@
%{
#include "llvm/Config/config.h"
#include "llvm/Support/Streams.h"
#include "Record.h"
typedef std::pair<llvm::Record*, std::vector<llvm::Init*>*> SubClassRefTy;
#include "FileParser.h"
@ -63,14 +64,17 @@ struct IncludeRec {
static std::vector<IncludeRec> IncludeStack;
std::ostream &err() {
if (IncludeStack.empty())
return std::cerr << "At end of input: ";
if (IncludeStack.empty()) {
cerr << "At end of input: ";
return *cerr.stream();
}
for (unsigned i = 0, e = IncludeStack.size()-1; i != e; ++i)
std::cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
return std::cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
cerr << "Included from " << IncludeStack[i].Filename << ":"
<< IncludeStack[i].LineNo << ":\n";
cerr << "Parsing " << IncludeStack.back().Filename << ":"
<< Filelineno << ": ";
return *cerr.stream();
}
/// ParseFile - this function begins the parsing of the specified tablegen file.
@ -82,7 +86,7 @@ void ParseFile(const std::string &Filename,
F = fopen(Filename.c_str(), "r");
if (F == 0) {
std::cerr << "Could not open input file '" + Filename + "'!\n";
cerr << "Could not open input file '" + Filename + "'!\n";
exit (1);
}
IncludeStack.push_back(IncludeRec(Filename, F));
@ -114,7 +118,7 @@ static void HandleInclude(const char *Buffer) {
}
assert(Length >= 2 && "Double quotes not found?");
std::string Filename(Buffer+1, Buffer+Length-1);
//std::cerr << "Filename = '" << Filename << "'\n";
//cerr << "Filename = '" << Filename << "'\n";
// Save the line number and lex buffer of the includer...
IncludeStack.back().LineNo = Filelineno;

3746
utils/TableGen/FileParser.cpp.cvs
View File

File diff suppressed because it is too large Load Diff

133
utils/TableGen/FileParser.h.cvs
View File

@ -1,4 +1,101 @@
typedef union {
/* A Bison parser, made by GNU Bison 2.3. */
/* Skeleton interface for Bison's Yacc-like parsers in C
Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
/* As a special exception, you may create a larger work that contains
part or all of the Bison parser skeleton and distribute that work
under terms of your choice, so long as that work isn't itself a
parser generator using the skeleton or a modified version thereof
as a parser skeleton. Alternatively, if you modify or redistribute
the parser skeleton itself, you may (at your option) remove this
special exception, which will cause the skeleton and the resulting
Bison output files to be licensed under the GNU General Public
License without this special exception.
This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */
/* Tokens. */
#ifndef YYTOKENTYPE
# define YYTOKENTYPE
/* Put the tokens into the symbol table, so that GDB and other debuggers
know about them. */
enum yytokentype {
INT = 258,
BIT = 259,
STRING = 260,
BITS = 261,
LIST = 262,
CODE = 263,
DAG = 264,
CLASS = 265,
DEF = 266,
MULTICLASS = 267,
DEFM = 268,
FIELD = 269,
LET = 270,
IN = 271,
SHLTOK = 272,
SRATOK = 273,
SRLTOK = 274,
STRCONCATTOK = 275,
INTVAL = 276,
ID = 277,
VARNAME = 278,
STRVAL = 279,
CODEFRAGMENT = 280
};
#endif
/* Tokens. */
#define INT 258
#define BIT 259
#define STRING 260
#define BITS 261
#define LIST 262
#define CODE 263
#define DAG 264
#define CLASS 265
#define DEF 266
#define MULTICLASS 267
#define DEFM 268
#define FIELD 269
#define LET 270
#define IN 271
#define SHLTOK 272
#define SRATOK 273
#define SRLTOK 274
#define STRCONCATTOK 275
#define INTVAL 276
#define ID 277
#define VARNAME 278
#define STRVAL 279
#define CODEFRAGMENT 280
#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
typedef union YYSTYPE
#line 210 "/Volumes/Gir/devel/llvm/llvm.src/utils/TableGen/FileParser.y"
{
std::string* StrVal;
int IntVal;
llvm::RecTy* Ty;
@ -10,30 +107,14 @@ typedef union {
SubClassRefTy* SubClassRef;
std::vector<SubClassRefTy>* SubClassList;
std::vector<std::pair<llvm::Init*, std::string> >* DagValueList;
} YYSTYPE;
#define INT 257
#define BIT 258
#define STRING 259
#define BITS 260
#define LIST 261
#define CODE 262
#define DAG 263
#define CLASS 264
#define DEF 265
#define MULTICLASS 266
#define DEFM 267
#define FIELD 268
#define LET 269
#define IN 270
#define SHLTOK 271
#define SRATOK 272
#define SRLTOK 273
#define STRCONCATTOK 274
#define INTVAL 275
#define ID 276
#define VARNAME 277
#define STRVAL 278
#define CODEFRAGMENT 279
}
/* Line 1529 of yacc.c. */
#line 113 "FileParser.tab.h"
YYSTYPE;
# define yystype YYSTYPE /* obsolescent; will be withdrawn */
# define YYSTYPE_IS_DECLARED 1
# define YYSTYPE_IS_TRIVIAL 1
#endif
extern YYSTYPE Filelval;

3
utils/TableGen/FileParser.y
View File

@ -14,6 +14,7 @@
%{
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Streams.h"
#include <algorithm>
#include <cstdio>
#define YYERROR_VERBOSE 1
@ -124,7 +125,7 @@ static void setValue(const std::string &ValName,
}
// We should have a BitsInit type now...
assert(dynamic_cast<BitsInit*>(BI) != 0 || &(std::cerr << *BI) == 0);
assert(dynamic_cast<BitsInit*>(BI) != 0 || (cerr << *BI).stream() == 0);
BitsInit *BInit = (BitsInit*)BI;
BitsInit *NewVal = new BitsInit(CurVal->getNumBits());

3
utils/TableGen/FileParser.y.cvs
View File

@ -14,6 +14,7 @@
%{
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Streams.h"
#include <algorithm>
#include <cstdio>
#define YYERROR_VERBOSE 1
@ -124,7 +125,7 @@ static void setValue(const std::string &ValName,
}
// We should have a BitsInit type now...
assert(dynamic_cast<BitsInit*>(BI) != 0 || &(std::cerr << *BI) == 0);
assert(dynamic_cast<BitsInit*>(BI) != 0 || (cerr << *BI).stream() == 0);
BitsInit *BInit = (BitsInit*)BI;
BitsInit *NewVal = new BitsInit(CurVal->getNumBits());

4
utils/TableGen/InstrInfoEmitter.cpp
View File

@ -37,7 +37,7 @@ void InstrInfoEmitter::runEnums(std::ostream &OS) {
}
if (Namespace.empty()) {
std::cerr << "No instructions defined!\n";
cerr << "No instructions defined!\n";
exit(1);
}
@ -349,7 +349,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
return;
}
std::cerr << "Unhandled initializer: " << *Val << "\n";
cerr << "Unhandled initializer: " << *Val << "\n";
throw "In record '" + R->getName() + "' for TSFlag emission.";
}

13
utils/TableGen/Record.cpp
View File

@ -13,6 +13,7 @@
#include "Record.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Streams.h"
#include <ios>
using namespace llvm;
@ -21,7 +22,7 @@ using namespace llvm;
// Type implementations
//===----------------------------------------------------------------------===//
void RecTy::dump() const { print(std::cerr); }
void RecTy::dump() const { print(*cerr.stream()); }
Init *BitRecTy::convertValue(BitsInit *BI) {
if (BI->getNumBits() != 1) return 0; // Only accept if just one bit!
@ -213,7 +214,7 @@ bool RecordRecTy::baseClassOf(const RecordRecTy *RHS) const {
// Initializer implementations
//===----------------------------------------------------------------------===//
void Init::dump() const { return print(std::cerr); }
void Init::dump() const { return print(*cerr.stream()); }
Init *BitsInit::convertInitializerBitRange(const std::vector<unsigned> &Bits) {
BitsInit *BI = new BitsInit(Bits.size());
@ -602,7 +603,7 @@ Init *FieldInit::resolveReferences(Record &R, const RecordVal *RV) {
if (NewRec != Rec) {
dump();
NewRec->dump(); std::cerr << "\n";
NewRec->dump(); cerr << "\n";
return new FieldInit(NewRec, FieldName);
}
return this;
@ -646,7 +647,7 @@ RecordVal::RecordVal(const std::string &N, RecTy *T, unsigned P)
assert(Value && "Cannot create unset value for current type!");
}
void RecordVal::dump() const { std::cerr << *this; }
void RecordVal::dump() const { cerr << *this; }
void RecordVal::print(std::ostream &OS, bool PrintSem) const {
if (getPrefix()) OS << "field ";
@ -681,7 +682,7 @@ void Record::resolveReferencesTo(const RecordVal *RV) {
}
void Record::dump() const { std::cerr << *this; }
void Record::dump() const { cerr << *this; }
std::ostream &llvm::operator<<(std::ostream &OS, const Record &R) {
OS << R.getName();
@ -874,7 +875,7 @@ std::string Record::getValueAsCode(const std::string &FieldName) const {
}
void RecordKeeper::dump() const { std::cerr << *this; }
void RecordKeeper::dump() const { cerr << *this; }
std::ostream &llvm::operator<<(std::ostream &OS, const RecordKeeper &RK) {
OS << "------------- Classes -----------------\n";

2
utils/TableGen/Record.h
View File

@ -18,7 +18,7 @@
#include <string>
#include <vector>
#include <map>
#include <iostream>
#include <ostream>
#include <cassert>
namespace llvm {

13
utils/TableGen/RegisterInfoEmitter.cpp
View File

@ -19,6 +19,7 @@
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Streams.h"
#include <set>
using namespace llvm;
@ -284,15 +285,15 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
for (unsigned j = 0, e = LI.size(); j != e; ++j) {
Record *Reg = LI[j];
if (RegisterAliases[R].count(Reg))
std::cerr << "Warning: register alias between " << getQualifiedName(R)
<< " and " << getQualifiedName(Reg)
<< " specified multiple times!\n";
cerr << "Warning: register alias between " << getQualifiedName(R)
<< " and " << getQualifiedName(Reg)
<< " specified multiple times!\n";
RegisterAliases[R].insert(Reg);
if (RegisterAliases[Reg].count(R))
std::cerr << "Warning: register alias between " << getQualifiedName(R)
<< " and " << getQualifiedName(Reg)
<< " specified multiple times!\n";
cerr << "Warning: register alias between " << getQualifiedName(R)
<< " and " << getQualifiedName(Reg)
<< " specified multiple times!\n";
RegisterAliases[Reg].insert(R);
}
}

15
utils/TableGen/TableGen.cpp
View File

@ -17,6 +17,7 @@
#include "Record.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Streams.h"
#include "llvm/System/Signals.h"
#include "llvm/Support/FileUtilities.h"
#include "CodeEmitterGen.h"
@ -99,12 +100,12 @@ int main(int argc, char **argv) {
cl::ParseCommandLineOptions(argc, argv);
ParseFile(InputFilename, IncludeDirs);
std::ostream *Out = &std::cout;
std::ostream *Out = cout.stream();
if (OutputFilename != "-") {
Out = new std::ofstream(OutputFilename.c_str());
if (!Out->good()) {
std::cerr << argv[0] << ": error opening " << OutputFilename << "!\n";
cerr << argv[0] << ": error opening " << OutputFilename << "!\n";
return 1;
}
@ -164,22 +165,22 @@ int main(int argc, char **argv) {
return 1;
}
} catch (const std::string &Error) {
std::cerr << argv[0] << ": " << Error << "\n";
if (Out != &std::cout) {
cerr << argv[0] << ": " << Error << "\n";
if (Out != cout.stream()) {
delete Out; // Close the file
std::remove(OutputFilename.c_str()); // Remove the file, it's broken
}
return 1;
} catch (...) {
std::cerr << argv[0] << ": Unknown unexpected exception occurred.\n";
if (Out != &std::cout) {
cerr << argv[0] << ": Unknown unexpected exception occurred.\n";
if (Out != cout.stream()) {
delete Out; // Close the file
std::remove(OutputFilename.c_str()); // Remove the file, it's broken
}
return 2;
}
if (Out != &std::cout) {
if (Out != cout.stream()) {
delete Out; // Close the file
}
return 0;

1
utils/TableGen/TableGenBackend.cpp
View File

@ -13,7 +13,6 @@
#include "TableGenBackend.h"
#include "Record.h"
#include <iostream>
using namespace llvm;
void TableGenBackend::EmitSourceFileHeader(const std::string &Desc,