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Fix r93758. Use isel patterns instead of c++ selection code to select rbit and make sure we pick different instructions for ARM vs. Thumb2.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93829 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-01-19 00:44:15 +00:00
parent f06c28aac4
commit f609bb8466
3 changed files with 7 additions and 8 deletions
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6
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@@ -1680,12 +1680,6 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
return CurDAG->getMachineNode(ARM::VMOVRRD, dl, MVT::i32, MVT::i32, return CurDAG->getMachineNode(ARM::VMOVRRD, dl, MVT::i32, MVT::i32,
N->getOperand(0), getAL(CurDAG), N->getOperand(0), getAL(CurDAG),
CurDAG->getRegister(0, MVT::i32)); CurDAG->getRegister(0, MVT::i32));
case ARMISD::RBIT: {
EVT VT = N->getValueType(0);
SDValue Ops[] = { N->getOperand(0),
getAL(CurDAG), CurDAG->getRegister(0, MVT::i32) };
return CurDAG->getMachineNode(ARM::RBIT, dl, VT, Ops, 3);
}
case ISD::UMUL_LOHI: { case ISD::UMUL_LOHI: {
if (Subtarget->isThumb1Only()) if (Subtarget->isThumb1Only())
break; break;

6
lib/Target/ARM/ARMInstrInfo.td
View File

@@ -107,6 +107,8 @@ def ARMMemBarrierV6 : SDNode<"ARMISD::MEMBARRIER", SDT_ARMMEMBARRIERV6,
def ARMSyncBarrierV6 : SDNode<"ARMISD::SYNCBARRIER", SDT_ARMMEMBARRIERV6, def ARMSyncBarrierV6 : SDNode<"ARMISD::SYNCBARRIER", SDT_ARMMEMBARRIERV6,
[SDNPHasChain]>; [SDNPHasChain]>;
def ARMrbit : SDNode<"ARMISD::RBIT", SDTIntUnaryOp>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// ARM Instruction Predicate Definitions. // ARM Instruction Predicate Definitions.
// //
@@ -1456,7 +1458,9 @@ def CLZ : AMiscA1I<0b000010110, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
} }
def RBIT : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr, def RBIT : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
"rbit", "\t$dst, $src", []>, Requires<[IsARM, HasV6T2]> { "rbit", "\t$dst, $src",
[(set GPR:$dst, (ARMrbit GPR:$src))]>,
Requires<[IsARM, HasV6T2]> {
let Inst{7-4} = 0b0011; let Inst{7-4} = 0b0011;
let Inst{11-8} = 0b1111; let Inst{11-8} = 0b1111;
let Inst{19-16} = 0b1111; let Inst{19-16} = 0b1111;

3
lib/Target/ARM/ARMInstrThumb2.td
View File

@@ -1541,7 +1541,8 @@ def t2CLZ : T2I_misc<0b11, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
"clz", "\t$dst, $src", [(set GPR:$dst, (ctlz GPR:$src))]>; "clz", "\t$dst, $src", [(set GPR:$dst, (ctlz GPR:$src))]>;
def t2RBIT : T2I_misc<0b01, 0b10, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr, def t2RBIT : T2I_misc<0b01, 0b10, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
"rbit", "\t$dst, $src", []>; "rbit", "\t$dst, $src",
[(set GPR:$dst, (ARMrbit GPR:$src))]>;
def t2REV : T2I_misc<0b01, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr, def t2REV : T2I_misc<0b01, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
"rev", ".w\t$dst, $src", [(set GPR:$dst, (bswap GPR:$src))]>; "rev", ".w\t$dst, $src", [(set GPR:$dst, (bswap GPR:$src))]>;