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Prune CRLFs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238125 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
NAKAMURA Takumi
2015-05-25 01:43:23 +00:00
parent 3dd00ff834
commit f61fb0c9a7
12 changed files with 1659 additions and 1659 deletions
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6
include/llvm/ADT/Twine.h
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@@ -10,7 +10,7 @@
#ifndef LLVM_ADT_TWINE_H #ifndef LLVM_ADT_TWINE_H
#define LLVM_ADT_TWINE_H #define LLVM_ADT_TWINE_H
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ErrorHandling.h"
@@ -137,7 +137,7 @@ namespace llvm {
const char *cString; const char *cString;
const std::string *stdString; const std::string *stdString;
const StringRef *stringRef; const StringRef *stringRef;
const SmallVectorImpl<char> *smallString; const SmallVectorImpl<char> *smallString;
char character; char character;
unsigned int decUI; unsigned int decUI;
int decI; int decI;
@@ -410,7 +410,7 @@ namespace llvm {
case CStringKind: case CStringKind:
case StdStringKind: case StdStringKind:
case StringRefKind: case StringRefKind:
case SmallStringKind: case SmallStringKind:
return true; return true;
default: default:
return false; return false;

2
include/llvm/CodeGen/GCs.h
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@@ -21,7 +21,7 @@ class GCMetadataPrinter;
/// FIXME: Collector instances are not useful on their own. These no longer /// FIXME: Collector instances are not useful on their own. These no longer
/// serve any purpose except to link in the plugins. /// serve any purpose except to link in the plugins.
/// Creates a CoreCLR-compatible garbage collector. /// Creates a CoreCLR-compatible garbage collector.
void linkCoreCLRGC(); void linkCoreCLRGC();
/// Creates an ocaml-compatible garbage collector. /// Creates an ocaml-compatible garbage collector.

110
lib/CodeGen/CoreCLRGC.cpp
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@@ -1,55 +1,55 @@
//===-- CoreCLRGC.cpp - CoreCLR Runtime GC Strategy -----------------------===// //===-- CoreCLRGC.cpp - CoreCLR Runtime GC Strategy -----------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
// This file is distributed under the University of Illinois Open Source // This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details. // License. See LICENSE.TXT for details.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// This file contains a GCStrategy for the CoreCLR Runtime. // This file contains a GCStrategy for the CoreCLR Runtime.
// The strategy is similar to Statepoint-example GC, but differs from it in // The strategy is similar to Statepoint-example GC, but differs from it in
// certain aspects, such as: // certain aspects, such as:
// 1) Base-pointers need not be explicitly tracked and reported for // 1) Base-pointers need not be explicitly tracked and reported for
// interior pointers // interior pointers
// 2) Uses a different format for encoding stack-maps // 2) Uses a different format for encoding stack-maps
// 3) Location of Safe-point polls: polls are only needed before loop-back edges // 3) Location of Safe-point polls: polls are only needed before loop-back edges
// and before tail-calls (not needed at function-entry) // and before tail-calls (not needed at function-entry)
// //
// The above differences in behavior are to be implemented in upcoming checkins. // The above differences in behavior are to be implemented in upcoming checkins.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "llvm/CodeGen/GCStrategy.h" #include "llvm/CodeGen/GCStrategy.h"
#include "llvm/IR/DerivedTypes.h" #include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Value.h" #include "llvm/IR/Value.h"
using namespace llvm; using namespace llvm;
namespace { namespace {
class CoreCLRGC : public GCStrategy { class CoreCLRGC : public GCStrategy {
public: public:
CoreCLRGC() { CoreCLRGC() {
UseStatepoints = true; UseStatepoints = true;
// These options are all gc.root specific, we specify them so that the // These options are all gc.root specific, we specify them so that the
// gc.root lowering code doesn't run. // gc.root lowering code doesn't run.
InitRoots = false; InitRoots = false;
NeededSafePoints = 0; NeededSafePoints = 0;
UsesMetadata = false; UsesMetadata = false;
CustomRoots = false; CustomRoots = false;
} }
Optional<bool> isGCManagedPointer(const Value *V) const override { Optional<bool> isGCManagedPointer(const Value *V) const override {
// Method is only valid on pointer typed values. // Method is only valid on pointer typed values.
PointerType *PT = cast<PointerType>(V->getType()); PointerType *PT = cast<PointerType>(V->getType());
// We pick addrspace(1) as our GC managed heap. // We pick addrspace(1) as our GC managed heap.
return (1 == PT->getAddressSpace()); return (1 == PT->getAddressSpace());
} }
}; };
} }
static GCRegistry::Add<CoreCLRGC> X("coreclr", static GCRegistry::Add<CoreCLRGC> X("coreclr",
"CoreCLR-compatible GC"); "CoreCLR-compatible GC");
namespace llvm { namespace llvm {
void linkCoreCLRGC() {} void linkCoreCLRGC() {}
} }

8
lib/Support/Twine.cpp
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@@ -118,10 +118,10 @@ void Twine::printOneChildRepr(raw_ostream &OS, Child Ptr,
OS << "stringref:\"" OS << "stringref:\""
<< Ptr.stringRef << "\""; << Ptr.stringRef << "\"";
break; break;
case Twine::SmallStringKind: case Twine::SmallStringKind:
OS << "smallstring:\"" OS << "smallstring:\""
<< *Ptr.smallString << "\""; << *Ptr.smallString << "\"";
break; break;
case Twine::CharKind: case Twine::CharKind:
OS << "char:\"" << Ptr.character << "\""; OS << "char:\"" << Ptr.character << "\"";
break; break;

32
lib/Target/Hexagon/Disassembler/Makefile
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@@ -1,16 +1,16 @@
##===-- lib/Target/Hexagon/Disassembler/Makefile -----------*- Makefile -*-===## ##===-- lib/Target/Hexagon/Disassembler/Makefile -----------*- Makefile -*-===##
# #
# The LLVM Compiler Infrastructure # The LLVM Compiler Infrastructure
# #
# This file is distributed under the University of Illinois Open Source # This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details. # License. See LICENSE.TXT for details.
# #
##===----------------------------------------------------------------------===## ##===----------------------------------------------------------------------===##
LEVEL = ../../../.. LEVEL = ../../../..
LIBRARYNAME = LLVMHexagonDisassembler LIBRARYNAME = LLVMHexagonDisassembler
# Hack: we need to include 'main' target directory to grab private headers # Hack: we need to include 'main' target directory to grab private headers
CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
include $(LEVEL)/Makefile.common include $(LEVEL)/Makefile.common

18
lib/Target/Hexagon/Makefile
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@@ -14,12 +14,12 @@ TARGET = Hexagon
BUILT_SOURCES = HexagonGenRegisterInfo.inc \ BUILT_SOURCES = HexagonGenRegisterInfo.inc \
HexagonGenInstrInfo.inc \ HexagonGenInstrInfo.inc \
HexagonGenAsmWriter.inc \ HexagonGenAsmWriter.inc \
HexagonGenDAGISel.inc HexagonGenSubtargetInfo.inc \ HexagonGenDAGISel.inc HexagonGenSubtargetInfo.inc \
HexagonGenCallingConv.inc \ HexagonGenCallingConv.inc \
HexagonGenDFAPacketizer.inc \ HexagonGenDFAPacketizer.inc \
HexagonGenMCCodeEmitter.inc \ HexagonGenMCCodeEmitter.inc \
HexagonGenDisassemblerTables.inc HexagonGenDisassemblerTables.inc
DIRS = TargetInfo MCTargetDesc Disassembler DIRS = TargetInfo MCTargetDesc Disassembler
include $(LEVEL)/Makefile.common include $(LEVEL)/Makefile.common

1964
lib/Target/X86/InstPrinter/X86InstComments.cpp
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File diff suppressed because it is too large Load Diff

868
lib/Target/X86/Utils/X86ShuffleDecode.cpp
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@@ -1,434 +1,434 @@
//===-- X86ShuffleDecode.cpp - X86 shuffle decode logic -------------------===// //===-- X86ShuffleDecode.cpp - X86 shuffle decode logic -------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
// This file is distributed under the University of Illinois Open Source // This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details. // License. See LICENSE.TXT for details.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// Define several functions to decode x86 specific shuffle semantics into a // Define several functions to decode x86 specific shuffle semantics into a
// generic vector mask. // generic vector mask.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "X86ShuffleDecode.h" #include "X86ShuffleDecode.h"
#include "llvm/IR/Constants.h" #include "llvm/IR/Constants.h"
#include "llvm/CodeGen/MachineValueType.h" #include "llvm/CodeGen/MachineValueType.h"
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Vector Mask Decoding // Vector Mask Decoding
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
namespace llvm { namespace llvm {
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
// Defaults the copying the dest value. // Defaults the copying the dest value.
ShuffleMask.push_back(0); ShuffleMask.push_back(0);
ShuffleMask.push_back(1); ShuffleMask.push_back(1);
ShuffleMask.push_back(2); ShuffleMask.push_back(2);
ShuffleMask.push_back(3); ShuffleMask.push_back(3);
// Decode the immediate. // Decode the immediate.
unsigned ZMask = Imm & 15; unsigned ZMask = Imm & 15;
unsigned CountD = (Imm >> 4) & 3; unsigned CountD = (Imm >> 4) & 3;
unsigned CountS = (Imm >> 6) & 3; unsigned CountS = (Imm >> 6) & 3;
// CountS selects which input element to use. // CountS selects which input element to use.
unsigned InVal = 4+CountS; unsigned InVal = 4+CountS;
// CountD specifies which element of destination to update. // CountD specifies which element of destination to update.
ShuffleMask[CountD] = InVal; ShuffleMask[CountD] = InVal;
// ZMask zaps values, potentially overriding the CountD elt. // ZMask zaps values, potentially overriding the CountD elt.
if (ZMask & 1) ShuffleMask[0] = SM_SentinelZero; if (ZMask & 1) ShuffleMask[0] = SM_SentinelZero;
if (ZMask & 2) ShuffleMask[1] = SM_SentinelZero; if (ZMask & 2) ShuffleMask[1] = SM_SentinelZero;
if (ZMask & 4) ShuffleMask[2] = SM_SentinelZero; if (ZMask & 4) ShuffleMask[2] = SM_SentinelZero;
if (ZMask & 8) ShuffleMask[3] = SM_SentinelZero; if (ZMask & 8) ShuffleMask[3] = SM_SentinelZero;
} }
// <3,1> or <6,7,2,3> // <3,1> or <6,7,2,3>
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) { void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = NElts/2; i != NElts; ++i) for (unsigned i = NElts/2; i != NElts; ++i)
ShuffleMask.push_back(NElts+i); ShuffleMask.push_back(NElts+i);
for (unsigned i = NElts/2; i != NElts; ++i) for (unsigned i = NElts/2; i != NElts; ++i)
ShuffleMask.push_back(i); ShuffleMask.push_back(i);
} }
// <0,2> or <0,1,4,5> // <0,2> or <0,1,4,5>
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) { void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = 0; i != NElts/2; ++i) for (unsigned i = 0; i != NElts/2; ++i)
ShuffleMask.push_back(i); ShuffleMask.push_back(i);
for (unsigned i = 0; i != NElts/2; ++i) for (unsigned i = 0; i != NElts/2; ++i)
ShuffleMask.push_back(NElts+i); ShuffleMask.push_back(NElts+i);
} }
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
for (int i = 0, e = NumElts / 2; i < e; ++i) { for (int i = 0, e = NumElts / 2; i < e; ++i) {
ShuffleMask.push_back(2 * i); ShuffleMask.push_back(2 * i);
ShuffleMask.push_back(2 * i); ShuffleMask.push_back(2 * i);
} }
} }
void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
for (int i = 0, e = NumElts / 2; i < e; ++i) { for (int i = 0, e = NumElts / 2; i < e; ++i) {
ShuffleMask.push_back(2 * i + 1); ShuffleMask.push_back(2 * i + 1);
ShuffleMask.push_back(2 * i + 1); ShuffleMask.push_back(2 * i + 1);
} }
} }
void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned VectorSizeInBits = VT.getSizeInBits(); unsigned VectorSizeInBits = VT.getSizeInBits();
unsigned ScalarSizeInBits = VT.getScalarSizeInBits(); unsigned ScalarSizeInBits = VT.getScalarSizeInBits();
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned NumLanes = VectorSizeInBits / 128; unsigned NumLanes = VectorSizeInBits / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
unsigned NumLaneSubElts = 64 / ScalarSizeInBits; unsigned NumLaneSubElts = 64 / ScalarSizeInBits;
for (unsigned l = 0; l < NumElts; l += NumLaneElts) for (unsigned l = 0; l < NumElts; l += NumLaneElts)
for (unsigned i = 0; i < NumLaneElts; i += NumLaneSubElts) for (unsigned i = 0; i < NumLaneElts; i += NumLaneSubElts)
for (unsigned s = 0; s != NumLaneSubElts; s++) for (unsigned s = 0; s != NumLaneSubElts; s++)
ShuffleMask.push_back(l + s); ShuffleMask.push_back(l + s);
} }
void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned VectorSizeInBits = VT.getSizeInBits(); unsigned VectorSizeInBits = VT.getSizeInBits();
unsigned NumElts = VectorSizeInBits / 8; unsigned NumElts = VectorSizeInBits / 8;
unsigned NumLanes = VectorSizeInBits / 128; unsigned NumLanes = VectorSizeInBits / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l < NumElts; l += NumLaneElts) for (unsigned l = 0; l < NumElts; l += NumLaneElts)
for (unsigned i = 0; i < NumLaneElts; ++i) { for (unsigned i = 0; i < NumLaneElts; ++i) {
int M = SM_SentinelZero; int M = SM_SentinelZero;
if (i >= Imm) M = i - Imm + l; if (i >= Imm) M = i - Imm + l;
ShuffleMask.push_back(M); ShuffleMask.push_back(M);
} }
} }
void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned VectorSizeInBits = VT.getSizeInBits(); unsigned VectorSizeInBits = VT.getSizeInBits();
unsigned NumElts = VectorSizeInBits / 8; unsigned NumElts = VectorSizeInBits / 8;
unsigned NumLanes = VectorSizeInBits / 128; unsigned NumLanes = VectorSizeInBits / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l < NumElts; l += NumLaneElts) for (unsigned l = 0; l < NumElts; l += NumLaneElts)
for (unsigned i = 0; i < NumLaneElts; ++i) { for (unsigned i = 0; i < NumLaneElts; ++i) {
unsigned Base = i + Imm; unsigned Base = i + Imm;
int M = Base + l; int M = Base + l;
if (Base >= NumLaneElts) M = SM_SentinelZero; if (Base >= NumLaneElts) M = SM_SentinelZero;
ShuffleMask.push_back(M); ShuffleMask.push_back(M);
} }
} }
void DecodePALIGNRMask(MVT VT, unsigned Imm, void DecodePALIGNRMask(MVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned Offset = Imm * (VT.getVectorElementType().getSizeInBits() / 8); unsigned Offset = Imm * (VT.getVectorElementType().getSizeInBits() / 8);
unsigned NumLanes = VT.getSizeInBits() / 128; unsigned NumLanes = VT.getSizeInBits() / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) { for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = 0; i != NumLaneElts; ++i) { for (unsigned i = 0; i != NumLaneElts; ++i) {
unsigned Base = i + Offset; unsigned Base = i + Offset;
// if i+offset is out of this lane then we actually need the other source // if i+offset is out of this lane then we actually need the other source
if (Base >= NumLaneElts) Base += NumElts - NumLaneElts; if (Base >= NumLaneElts) Base += NumElts - NumLaneElts;
ShuffleMask.push_back(Base + l); ShuffleMask.push_back(Base + l);
} }
} }
} }
/// DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*. /// DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*.
/// VT indicates the type of the vector allowing it to handle different /// VT indicates the type of the vector allowing it to handle different
/// datatypes and vector widths. /// datatypes and vector widths.
void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned NumLanes = VT.getSizeInBits() / 128; unsigned NumLanes = VT.getSizeInBits() / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
unsigned NewImm = Imm; unsigned NewImm = Imm;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) { for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = 0; i != NumLaneElts; ++i) { for (unsigned i = 0; i != NumLaneElts; ++i) {
ShuffleMask.push_back(NewImm % NumLaneElts + l); ShuffleMask.push_back(NewImm % NumLaneElts + l);
NewImm /= NumLaneElts; NewImm /= NumLaneElts;
} }
if (NumLaneElts == 4) NewImm = Imm; // reload imm if (NumLaneElts == 4) NewImm = Imm; // reload imm
} }
} }
void DecodePSHUFHWMask(MVT VT, unsigned Imm, void DecodePSHUFHWMask(MVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
for (unsigned l = 0; l != NumElts; l += 8) { for (unsigned l = 0; l != NumElts; l += 8) {
unsigned NewImm = Imm; unsigned NewImm = Imm;
for (unsigned i = 0, e = 4; i != e; ++i) { for (unsigned i = 0, e = 4; i != e; ++i) {
ShuffleMask.push_back(l + i); ShuffleMask.push_back(l + i);
} }
for (unsigned i = 4, e = 8; i != e; ++i) { for (unsigned i = 4, e = 8; i != e; ++i) {
ShuffleMask.push_back(l + 4 + (NewImm & 3)); ShuffleMask.push_back(l + 4 + (NewImm & 3));
NewImm >>= 2; NewImm >>= 2;
} }
} }
} }
void DecodePSHUFLWMask(MVT VT, unsigned Imm, void DecodePSHUFLWMask(MVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
for (unsigned l = 0; l != NumElts; l += 8) { for (unsigned l = 0; l != NumElts; l += 8) {
unsigned NewImm = Imm; unsigned NewImm = Imm;
for (unsigned i = 0, e = 4; i != e; ++i) { for (unsigned i = 0, e = 4; i != e; ++i) {
ShuffleMask.push_back(l + (NewImm & 3)); ShuffleMask.push_back(l + (NewImm & 3));
NewImm >>= 2; NewImm >>= 2;
} }
for (unsigned i = 4, e = 8; i != e; ++i) { for (unsigned i = 4, e = 8; i != e; ++i) {
ShuffleMask.push_back(l + i); ShuffleMask.push_back(l + i);
} }
} }
} }
/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
/// the type of the vector allowing it to handle different datatypes and vector /// the type of the vector allowing it to handle different datatypes and vector
/// widths. /// widths.
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned NumLanes = VT.getSizeInBits() / 128; unsigned NumLanes = VT.getSizeInBits() / 128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
unsigned NewImm = Imm; unsigned NewImm = Imm;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) { for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
// each half of a lane comes from different source // each half of a lane comes from different source
for (unsigned s = 0; s != NumElts*2; s += NumElts) { for (unsigned s = 0; s != NumElts*2; s += NumElts) {
for (unsigned i = 0; i != NumLaneElts/2; ++i) { for (unsigned i = 0; i != NumLaneElts/2; ++i) {
ShuffleMask.push_back(NewImm % NumLaneElts + s + l); ShuffleMask.push_back(NewImm % NumLaneElts + s + l);
NewImm /= NumLaneElts; NewImm /= NumLaneElts;
} }
} }
if (NumLaneElts == 4) NewImm = Imm; // reload imm if (NumLaneElts == 4) NewImm = Imm; // reload imm
} }
} }
/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd /// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
/// and punpckh*. VT indicates the type of the vector allowing it to handle /// and punpckh*. VT indicates the type of the vector allowing it to handle
/// different datatypes and vector widths. /// different datatypes and vector widths.
void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
// Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate // Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
// independently on 128-bit lanes. // independently on 128-bit lanes.
unsigned NumLanes = VT.getSizeInBits() / 128; unsigned NumLanes = VT.getSizeInBits() / 128;
if (NumLanes == 0 ) NumLanes = 1; // Handle MMX if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) { for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = l + NumLaneElts/2, e = l + NumLaneElts; i != e; ++i) { for (unsigned i = l + NumLaneElts/2, e = l + NumLaneElts; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1 ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i+NumElts); // Reads from src/src2 ShuffleMask.push_back(i+NumElts); // Reads from src/src2
} }
} }
} }
/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd /// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
/// and punpckl*. VT indicates the type of the vector allowing it to handle /// and punpckl*. VT indicates the type of the vector allowing it to handle
/// different datatypes and vector widths. /// different datatypes and vector widths.
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
// Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate // Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
// independently on 128-bit lanes. // independently on 128-bit lanes.
unsigned NumLanes = VT.getSizeInBits() / 128; unsigned NumLanes = VT.getSizeInBits() / 128;
if (NumLanes == 0 ) NumLanes = 1; // Handle MMX if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) { for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = l, e = l + NumLaneElts/2; i != e; ++i) { for (unsigned i = l, e = l + NumLaneElts/2; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1 ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i+NumElts); // Reads from src/src2 ShuffleMask.push_back(i+NumElts); // Reads from src/src2
} }
} }
} }
void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
if (Imm & 0x88) if (Imm & 0x88)
return; // Not a shuffle return; // Not a shuffle
unsigned HalfSize = VT.getVectorNumElements()/2; unsigned HalfSize = VT.getVectorNumElements()/2;
for (unsigned l = 0; l != 2; ++l) { for (unsigned l = 0; l != 2; ++l) {
unsigned HalfBegin = ((Imm >> (l*4)) & 0x3) * HalfSize; unsigned HalfBegin = ((Imm >> (l*4)) & 0x3) * HalfSize;
for (unsigned i = HalfBegin, e = HalfBegin+HalfSize; i != e; ++i) for (unsigned i = HalfBegin, e = HalfBegin+HalfSize; i != e; ++i)
ShuffleMask.push_back(i); ShuffleMask.push_back(i);
} }
} }
void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) { void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
Type *MaskTy = C->getType(); Type *MaskTy = C->getType();
// It is not an error for the PSHUFB mask to not be a vector of i8 because the // It is not an error for the PSHUFB mask to not be a vector of i8 because the
// constant pool uniques constants by their bit representation. // constant pool uniques constants by their bit representation.
// e.g. the following take up the same space in the constant pool: // e.g. the following take up the same space in the constant pool:
// i128 -170141183420855150465331762880109871104 // i128 -170141183420855150465331762880109871104
// //
// <2 x i64> <i64 -9223372034707292160, i64 -9223372034707292160> // <2 x i64> <i64 -9223372034707292160, i64 -9223372034707292160>
// //
// <4 x i32> <i32 -2147483648, i32 -2147483648, // <4 x i32> <i32 -2147483648, i32 -2147483648,
// i32 -2147483648, i32 -2147483648> // i32 -2147483648, i32 -2147483648>
unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits(); unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
if (MaskTySize != 128 && MaskTySize != 256) // FIXME: Add support for AVX-512. if (MaskTySize != 128 && MaskTySize != 256) // FIXME: Add support for AVX-512.
return; return;
// This is a straightforward byte vector. // This is a straightforward byte vector.
if (MaskTy->isVectorTy() && MaskTy->getVectorElementType()->isIntegerTy(8)) { if (MaskTy->isVectorTy() && MaskTy->getVectorElementType()->isIntegerTy(8)) {
int NumElements = MaskTy->getVectorNumElements(); int NumElements = MaskTy->getVectorNumElements();
ShuffleMask.reserve(NumElements); ShuffleMask.reserve(NumElements);
for (int i = 0; i < NumElements; ++i) { for (int i = 0; i < NumElements; ++i) {
// For AVX vectors with 32 bytes the base of the shuffle is the 16-byte // For AVX vectors with 32 bytes the base of the shuffle is the 16-byte
// lane of the vector we're inside. // lane of the vector we're inside.
int Base = i < 16 ? 0 : 16; int Base = i < 16 ? 0 : 16;
Constant *COp = C->getAggregateElement(i); Constant *COp = C->getAggregateElement(i);
if (!COp) { if (!COp) {
ShuffleMask.clear(); ShuffleMask.clear();
return; return;
} else if (isa<UndefValue>(COp)) { } else if (isa<UndefValue>(COp)) {
ShuffleMask.push_back(SM_SentinelUndef); ShuffleMask.push_back(SM_SentinelUndef);
continue; continue;
} }
uint64_t Element = cast<ConstantInt>(COp)->getZExtValue(); uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
// If the high bit (7) of the byte is set, the element is zeroed. // If the high bit (7) of the byte is set, the element is zeroed.
if (Element & (1 << 7)) if (Element & (1 << 7))
ShuffleMask.push_back(SM_SentinelZero); ShuffleMask.push_back(SM_SentinelZero);
else { else {
// Only the least significant 4 bits of the byte are used. // Only the least significant 4 bits of the byte are used.
int Index = Base + (Element & 0xf); int Index = Base + (Element & 0xf);
ShuffleMask.push_back(Index); ShuffleMask.push_back(Index);
} }
} }
} }
// TODO: Handle funny-looking vectors too. // TODO: Handle funny-looking vectors too.
} }
void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
for (int i = 0, e = RawMask.size(); i < e; ++i) { for (int i = 0, e = RawMask.size(); i < e; ++i) {
uint64_t M = RawMask[i]; uint64_t M = RawMask[i];
if (M == (uint64_t)SM_SentinelUndef) { if (M == (uint64_t)SM_SentinelUndef) {
ShuffleMask.push_back(M); ShuffleMask.push_back(M);
continue; continue;
} }
// For AVX vectors with 32 bytes the base of the shuffle is the half of // For AVX vectors with 32 bytes the base of the shuffle is the half of
// the vector we're inside. // the vector we're inside.
int Base = i < 16 ? 0 : 16; int Base = i < 16 ? 0 : 16;
// If the high bit (7) of the byte is set, the element is zeroed. // If the high bit (7) of the byte is set, the element is zeroed.
if (M & (1 << 7)) if (M & (1 << 7))
ShuffleMask.push_back(SM_SentinelZero); ShuffleMask.push_back(SM_SentinelZero);
else { else {
// Only the least significant 4 bits of the byte are used. // Only the least significant 4 bits of the byte are used.
int Index = Base + (M & 0xf); int Index = Base + (M & 0xf);
ShuffleMask.push_back(Index); ShuffleMask.push_back(Index);
} }
} }
} }
void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
int ElementBits = VT.getScalarSizeInBits(); int ElementBits = VT.getScalarSizeInBits();
int NumElements = VT.getVectorNumElements(); int NumElements = VT.getVectorNumElements();
for (int i = 0; i < NumElements; ++i) { for (int i = 0; i < NumElements; ++i) {
// If there are more than 8 elements in the vector, then any immediate blend // If there are more than 8 elements in the vector, then any immediate blend
// mask applies to each 128-bit lane. There can never be more than // mask applies to each 128-bit lane. There can never be more than
// 8 elements in a 128-bit lane with an immediate blend. // 8 elements in a 128-bit lane with an immediate blend.
int Bit = NumElements > 8 ? i % (128 / ElementBits) : i; int Bit = NumElements > 8 ? i % (128 / ElementBits) : i;
assert(Bit < 8 && assert(Bit < 8 &&
"Immediate blends only operate over 8 elements at a time!"); "Immediate blends only operate over 8 elements at a time!");
ShuffleMask.push_back(((Imm >> Bit) & 1) ? NumElements + i : i); ShuffleMask.push_back(((Imm >> Bit) & 1) ? NumElements + i : i);
} }
} }
/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD. /// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
/// No VT provided since it only works on 256-bit, 4 element vectors. /// No VT provided since it only works on 256-bit, 4 element vectors.
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = 0; i != 4; ++i) { for (unsigned i = 0; i != 4; ++i) {
ShuffleMask.push_back((Imm >> (2*i)) & 3); ShuffleMask.push_back((Imm >> (2*i)) & 3);
} }
} }
void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) { void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
Type *MaskTy = C->getType(); Type *MaskTy = C->getType();
assert(MaskTy->isVectorTy() && "Expected a vector constant mask!"); assert(MaskTy->isVectorTy() && "Expected a vector constant mask!");
assert(MaskTy->getVectorElementType()->isIntegerTy() && assert(MaskTy->getVectorElementType()->isIntegerTy() &&
"Expected integer constant mask elements!"); "Expected integer constant mask elements!");
int ElementBits = MaskTy->getScalarSizeInBits(); int ElementBits = MaskTy->getScalarSizeInBits();
int NumElements = MaskTy->getVectorNumElements(); int NumElements = MaskTy->getVectorNumElements();
assert((NumElements == 2 || NumElements == 4 || NumElements == 8) && assert((NumElements == 2 || NumElements == 4 || NumElements == 8) &&
"Unexpected number of vector elements."); "Unexpected number of vector elements.");
ShuffleMask.reserve(NumElements); ShuffleMask.reserve(NumElements);
if (auto *CDS = dyn_cast<ConstantDataSequential>(C)) { if (auto *CDS = dyn_cast<ConstantDataSequential>(C)) {
assert((unsigned)NumElements == CDS->getNumElements() && assert((unsigned)NumElements == CDS->getNumElements() &&
"Constant mask has a different number of elements!"); "Constant mask has a different number of elements!");
for (int i = 0; i < NumElements; ++i) { for (int i = 0; i < NumElements; ++i) {
int Base = (i * ElementBits / 128) * (128 / ElementBits); int Base = (i * ElementBits / 128) * (128 / ElementBits);
uint64_t Element = CDS->getElementAsInteger(i); uint64_t Element = CDS->getElementAsInteger(i);
// Only the least significant 2 bits of the integer are used. // Only the least significant 2 bits of the integer are used.
int Index = Base + (Element & 0x3); int Index = Base + (Element & 0x3);
ShuffleMask.push_back(Index); ShuffleMask.push_back(Index);
} }
} else if (auto *CV = dyn_cast<ConstantVector>(C)) { } else if (auto *CV = dyn_cast<ConstantVector>(C)) {
assert((unsigned)NumElements == C->getNumOperands() && assert((unsigned)NumElements == C->getNumOperands() &&
"Constant mask has a different number of elements!"); "Constant mask has a different number of elements!");
for (int i = 0; i < NumElements; ++i) { for (int i = 0; i < NumElements; ++i) {
int Base = (i * ElementBits / 128) * (128 / ElementBits); int Base = (i * ElementBits / 128) * (128 / ElementBits);
Constant *COp = CV->getOperand(i); Constant *COp = CV->getOperand(i);
if (isa<UndefValue>(COp)) { if (isa<UndefValue>(COp)) {
ShuffleMask.push_back(SM_SentinelUndef); ShuffleMask.push_back(SM_SentinelUndef);
continue; continue;
} }
uint64_t Element = cast<ConstantInt>(COp)->getZExtValue(); uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
// Only the least significant 2 bits of the integer are used. // Only the least significant 2 bits of the integer are used.
int Index = Base + (Element & 0x3); int Index = Base + (Element & 0x3);
ShuffleMask.push_back(Index); ShuffleMask.push_back(Index);
} }
} }
} }
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl<int> &Mask) { void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl<int> &Mask) {
unsigned NumDstElts = DstVT.getVectorNumElements(); unsigned NumDstElts = DstVT.getVectorNumElements();
unsigned SrcScalarBits = SrcVT.getScalarSizeInBits(); unsigned SrcScalarBits = SrcVT.getScalarSizeInBits();
unsigned DstScalarBits = DstVT.getScalarSizeInBits(); unsigned DstScalarBits = DstVT.getScalarSizeInBits();
unsigned Scale = DstScalarBits / SrcScalarBits; unsigned Scale = DstScalarBits / SrcScalarBits;
assert(SrcScalarBits < DstScalarBits && assert(SrcScalarBits < DstScalarBits &&
"Expected zero extension mask to increase scalar size"); "Expected zero extension mask to increase scalar size");
assert(SrcVT.getVectorNumElements() >= NumDstElts && assert(SrcVT.getVectorNumElements() >= NumDstElts &&
"Too many zero extension lanes"); "Too many zero extension lanes");
for (unsigned i = 0; i != NumDstElts; i++) { for (unsigned i = 0; i != NumDstElts; i++) {
Mask.push_back(i); Mask.push_back(i);
for (unsigned j = 1; j != Scale; j++) for (unsigned j = 1; j != Scale; j++)
Mask.push_back(SM_SentinelZero); Mask.push_back(SM_SentinelZero);
} }
} }
void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
ShuffleMask.push_back(0); ShuffleMask.push_back(0);
for (unsigned i = 1; i < NumElts; i++) for (unsigned i = 1; i < NumElts; i++)
ShuffleMask.push_back(SM_SentinelZero); ShuffleMask.push_back(SM_SentinelZero);
} }
void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl<int> &Mask) { void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl<int> &Mask) {
// First element comes from the first element of second source. // First element comes from the first element of second source.
// Remaining elements: Load zero extends / Move copies from first source. // Remaining elements: Load zero extends / Move copies from first source.
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
Mask.push_back(NumElts); Mask.push_back(NumElts);
for (unsigned i = 1; i < NumElts; i++) for (unsigned i = 1; i < NumElts; i++)
Mask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); Mask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i);
} }
} // llvm namespace } // llvm namespace

210
lib/Target/X86/Utils/X86ShuffleDecode.h
View File

@@ -1,105 +1,105 @@
//===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===// //===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
// This file is distributed under the University of Illinois Open Source // This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details. // License. See LICENSE.TXT for details.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// Define several functions to decode x86 specific shuffle semantics into a // Define several functions to decode x86 specific shuffle semantics into a
// generic vector mask. // generic vector mask.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H #ifndef LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
#define LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H #define LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/ArrayRef.h"
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Vector Mask Decoding // Vector Mask Decoding
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
namespace llvm { namespace llvm {
class Constant; class Constant;
class MVT; class MVT;
enum { SM_SentinelUndef = -1, SM_SentinelZero = -2 }; enum { SM_SentinelUndef = -1, SM_SentinelZero = -2 };
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
// <3,1> or <6,7,2,3> // <3,1> or <6,7,2,3>
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask); void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
// <0,2> or <0,1,4,5> // <0,2> or <0,1,4,5>
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask); void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodePSHUFLWMask(MVT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodePSHUFLWMask(MVT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
/// the type of the vector allowing it to handle different datatypes and vector /// the type of the vector allowing it to handle different datatypes and vector
/// widths. /// widths.
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd /// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
/// and punpckh*. VT indicates the type of the vector allowing it to handle /// and punpckh*. VT indicates the type of the vector allowing it to handle
/// different datatypes and vector widths. /// different datatypes and vector widths.
void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd /// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
/// and punpckl*. VT indicates the type of the vector allowing it to handle /// and punpckl*. VT indicates the type of the vector allowing it to handle
/// different datatypes and vector widths. /// different datatypes and vector widths.
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a PSHUFB mask from an IR-level vector constant. /// \brief Decode a PSHUFB mask from an IR-level vector constant.
void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask); void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a PSHUFB mask from a raw array of constants such as from /// \brief Decode a PSHUFB mask from a raw array of constants such as from
/// BUILD_VECTOR. /// BUILD_VECTOR.
void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a BLEND immediate mask into a shuffle mask. /// \brief Decode a BLEND immediate mask into a shuffle mask.
void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD. /// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
/// No VT provided since it only works on 256-bit, 4 element vectors. /// No VT provided since it only works on 256-bit, 4 element vectors.
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a VPERMILP variable mask from an IR-level vector constant. /// \brief Decode a VPERMILP variable mask from an IR-level vector constant.
void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask); void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a zero extension instruction as a shuffle mask. /// \brief Decode a zero extension instruction as a shuffle mask.
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a move lower and zero upper instruction as a shuffle mask. /// \brief Decode a move lower and zero upper instruction as a shuffle mask.
void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a scalar float move instruction as a shuffle mask. /// \brief Decode a scalar float move instruction as a shuffle mask.
void DecodeScalarMoveMask(MVT VT, bool IsLoad, void DecodeScalarMoveMask(MVT VT, bool IsLoad,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
} // llvm namespace } // llvm namespace
#endif #endif

28
lib/Transforms/Scalar/PlaceSafepoints.cpp
View File

@@ -16,7 +16,7 @@
// return PC of the call. A runtime can determine where values listed in the // return PC of the call. A runtime can determine where values listed in the
// deopt arguments and (after RewriteStatepointsForGC) gc arguments are located // deopt arguments and (after RewriteStatepointsForGC) gc arguments are located
// on the stack when the code is suspended inside such a call. Every parse // on the stack when the code is suspended inside such a call. Every parse
// point is represented by a call wrapped in an gc.statepoint intrinsic. // point is represented by a call wrapped in an gc.statepoint intrinsic.
// - A "poll" is an explicit check in the generated code to determine if the // - A "poll" is an explicit check in the generated code to determine if the
// runtime needs the generated code to cooperate by calling a helper routine // runtime needs the generated code to cooperate by calling a helper routine
// and thus suspending its execution at a known state. The call to the helper // and thus suspending its execution at a known state. The call to the helper
@@ -127,7 +127,7 @@ struct PlaceBackedgeSafepointsImpl : public FunctionPass {
ScalarEvolution *SE = nullptr; ScalarEvolution *SE = nullptr;
DominatorTree *DT = nullptr; DominatorTree *DT = nullptr;
LoopInfo *LI = nullptr; LoopInfo *LI = nullptr;
PlaceBackedgeSafepointsImpl(bool CallSafepoints = false) PlaceBackedgeSafepointsImpl(bool CallSafepoints = false)
: FunctionPass(ID), CallSafepointsEnabled(CallSafepoints) { : FunctionPass(ID), CallSafepointsEnabled(CallSafepoints) {
initializePlaceBackedgeSafepointsImplPass(*PassRegistry::getPassRegistry()); initializePlaceBackedgeSafepointsImplPass(*PassRegistry::getPassRegistry());
@@ -150,7 +150,7 @@ struct PlaceBackedgeSafepointsImpl : public FunctionPass {
} }
return false; return false;
} }
void getAnalysisUsage(AnalysisUsage &AU) const override { void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<DominatorTreeWrapperPass>(); AU.addRequired<DominatorTreeWrapperPass>();
AU.addRequired<ScalarEvolution>(); AU.addRequired<ScalarEvolution>();
@@ -186,7 +186,7 @@ struct PlaceSafepoints : public FunctionPass {
// Insert a safepoint poll immediately before the given instruction. Does // Insert a safepoint poll immediately before the given instruction. Does
// not handle the parsability of state at the runtime call, that's the // not handle the parsability of state at the runtime call, that's the
// callers job. // callers job.
static void static void
InsertSafepointPoll(Instruction *after, InsertSafepointPoll(Instruction *after,
std::vector<CallSite> &ParsePointsNeeded /*rval*/); std::vector<CallSite> &ParsePointsNeeded /*rval*/);
@@ -329,7 +329,7 @@ static void scanInlinedCode(Instruction *start, Instruction *end,
bool PlaceBackedgeSafepointsImpl::runOnLoop(Loop *L) { bool PlaceBackedgeSafepointsImpl::runOnLoop(Loop *L) {
// Loop through all loop latches (branches controlling backedges). We need // Loop through all loop latches (branches controlling backedges). We need
// to place a safepoint on every backedge (potentially). // to place a safepoint on every backedge (potentially).
// Note: In common usage, there will be only one edge due to LoopSimplify // Note: In common usage, there will be only one edge due to LoopSimplify
// having run sometime earlier in the pipeline, but this code must be correct // having run sometime earlier in the pipeline, but this code must be correct
// w.r.t. loops with multiple backedges. // w.r.t. loops with multiple backedges.
@@ -383,7 +383,7 @@ bool PlaceBackedgeSafepointsImpl::runOnLoop(Loop *L) {
} }
/// Returns true if an entry safepoint is not required before this callsite in /// Returns true if an entry safepoint is not required before this callsite in
/// the caller function. /// the caller function.
static bool doesNotRequireEntrySafepointBefore(const CallSite &CS) { static bool doesNotRequireEntrySafepointBefore(const CallSite &CS) {
Instruction *Inst = CS.getInstruction(); Instruction *Inst = CS.getInstruction();
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) { if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
@@ -520,14 +520,14 @@ static bool isGCSafepointPoll(Function &F) {
/// Returns true if this function should be rewritten to include safepoint /// Returns true if this function should be rewritten to include safepoint
/// polls and parseable call sites. The main point of this function is to be /// polls and parseable call sites. The main point of this function is to be
/// an extension point for custom logic. /// an extension point for custom logic.
static bool shouldRewriteFunction(Function &F) { static bool shouldRewriteFunction(Function &F) {
// TODO: This should check the GCStrategy // TODO: This should check the GCStrategy
if (F.hasGC()) { if (F.hasGC()) {
const char *FunctionGCName = F.getGC(); const char *FunctionGCName = F.getGC();
const StringRef StatepointExampleName("statepoint-example"); const StringRef StatepointExampleName("statepoint-example");
const StringRef CoreCLRName("coreclr"); const StringRef CoreCLRName("coreclr");
return (StatepointExampleName == FunctionGCName) || return (StatepointExampleName == FunctionGCName) ||
(CoreCLRName == FunctionGCName); (CoreCLRName == FunctionGCName);
} else } else
return false; return false;
@@ -567,7 +567,7 @@ bool PlaceSafepoints::runOnFunction(Function &F) {
if (isGCSafepointPoll(F)) { if (isGCSafepointPoll(F)) {
// Given we're inlining this inside of safepoint poll insertion, this // Given we're inlining this inside of safepoint poll insertion, this
// doesn't make any sense. Note that we do make any contained calls // doesn't make any sense. Note that we do make any contained calls
// parseable after we inline a poll. // parseable after we inline a poll.
return false; return false;
} }
@@ -629,7 +629,7 @@ bool PlaceSafepoints::runOnFunction(Function &F) {
for (TerminatorInst *Term : PollLocations) { for (TerminatorInst *Term : PollLocations) {
// We are inserting a poll, the function is modified // We are inserting a poll, the function is modified
modified = true; modified = true;
if (SplitBackedge) { if (SplitBackedge) {
// Split the backedge of the loop and insert the poll within that new // Split the backedge of the loop and insert the poll within that new
// basic block. This creates a loop with two latches per original // basic block. This creates a loop with two latches per original
@@ -690,7 +690,7 @@ bool PlaceSafepoints::runOnFunction(Function &F) {
// The dominator tree has been invalidated by the inlining performed in the // The dominator tree has been invalidated by the inlining performed in the
// above loop. TODO: Teach the inliner how to update the dom tree? // above loop. TODO: Teach the inliner how to update the dom tree?
DT.recalculate(F); DT.recalculate(F);
if (enableCallSafepoints(F)) { if (enableCallSafepoints(F)) {
std::vector<CallSite> Calls; std::vector<CallSite> Calls;
findCallSafepoints(F, Calls); findCallSafepoints(F, Calls);

18
lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
View File

@@ -307,18 +307,18 @@ static Value *findBaseOfVector(Value *I, Value *Index) {
// For an insert element, we might be able to look through it if we know // For an insert element, we might be able to look through it if we know
// something about the indexes, but if the indices are arbitrary values, we // something about the indexes, but if the indices are arbitrary values, we
// can't without much more extensive scalarization. // can't without much more extensive scalarization.
if (InsertElementInst *IEI = dyn_cast<InsertElementInst>(I)) { if (InsertElementInst *IEI = dyn_cast<InsertElementInst>(I)) {
Value *InsertIndex = IEI->getOperand(2); Value *InsertIndex = IEI->getOperand(2);
// This index is inserting the value, look for it's base // This index is inserting the value, look for it's base
if (InsertIndex == Index) if (InsertIndex == Index)
return findBaseDefiningValue(IEI->getOperand(1)); return findBaseDefiningValue(IEI->getOperand(1));
// Both constant, and can't be equal per above. This insert is definitely // Both constant, and can't be equal per above. This insert is definitely
// not relevant, look back at the rest of the vector and keep trying. // not relevant, look back at the rest of the vector and keep trying.
if (isa<ConstantInt>(Index) && isa<ConstantInt>(InsertIndex)) if (isa<ConstantInt>(Index) && isa<ConstantInt>(InsertIndex))
return findBaseOfVector(IEI->getOperand(0), Index); return findBaseOfVector(IEI->getOperand(0), Index);
} }
// Note: This code is currently rather incomplete. We are essentially only // Note: This code is currently rather incomplete. We are essentially only
// handling cases where the vector element is trivially a base pointer. We // handling cases where the vector element is trivially a base pointer. We
// need to update the entire base pointer construction algorithm to know how // need to update the entire base pointer construction algorithm to know how
@@ -1878,7 +1878,7 @@ static void rematerializeLiveValues(CallSite CS,
PartiallyConstructedSafepointRecord &Info, PartiallyConstructedSafepointRecord &Info,
TargetTransformInfo &TTI) { TargetTransformInfo &TTI) {
const unsigned int ChainLengthThreshold = 10; const unsigned int ChainLengthThreshold = 10;
// Record values we are going to delete from this statepoint live set. // Record values we are going to delete from this statepoint live set.
// We can not di this in following loop due to iterator invalidation. // We can not di this in following loop due to iterator invalidation.
SmallVector<Value *, 32> LiveValuesToBeDeleted; SmallVector<Value *, 32> LiveValuesToBeDeleted;
@@ -2133,7 +2133,7 @@ static bool insertParsePoints(Function &F, DominatorTree &DT, Pass *P,
TargetTransformInfo &TTI = TargetTransformInfo &TTI =
P->getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F); P->getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
for (size_t i = 0; i < records.size(); i++) { for (size_t i = 0; i < records.size(); i++) {
struct PartiallyConstructedSafepointRecord &info = records[i]; struct PartiallyConstructedSafepointRecord &info = records[i];
CallSite &CS = toUpdate[i]; CallSite &CS = toUpdate[i];
@@ -2202,10 +2202,10 @@ static bool insertParsePoints(Function &F, DominatorTree &DT, Pass *P,
static bool shouldRewriteStatepointsIn(Function &F) { static bool shouldRewriteStatepointsIn(Function &F) {
// TODO: This should check the GCStrategy // TODO: This should check the GCStrategy
if (F.hasGC()) { if (F.hasGC()) {
const char *FunctionGCName = F.getGC(); const char *FunctionGCName = F.getGC();
const StringRef StatepointExampleName("statepoint-example"); const StringRef StatepointExampleName("statepoint-example");
const StringRef CoreCLRName("coreclr"); const StringRef CoreCLRName("coreclr");
return (StatepointExampleName == FunctionGCName) || return (StatepointExampleName == FunctionGCName) ||
(CoreCLRName == FunctionGCName); (CoreCLRName == FunctionGCName);
} }
else else

54
tools/llvm-jitlistener/Makefile
View File

@@ -1,27 +1,27 @@
##===- tools/llvm-jitlistener/Makefile ---------------------*- Makefile -*-===## ##===- tools/llvm-jitlistener/Makefile ---------------------*- Makefile -*-===##
# #
# The LLVM Compiler Infrastructure # The LLVM Compiler Infrastructure
# #
# This file is distributed under the University of Illinois Open Source # This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details. # License. See LICENSE.TXT for details.
# #
##===----------------------------------------------------------------------===## ##===----------------------------------------------------------------------===##
LEVEL := ../.. LEVEL := ../..
TOOLNAME := llvm-jitlistener TOOLNAME := llvm-jitlistener
include $(LEVEL)/Makefile.config include $(LEVEL)/Makefile.config
LINK_COMPONENTS := mcjit interpreter nativecodegen bitreader asmparser irreader selectiondag Object LINK_COMPONENTS := mcjit interpreter nativecodegen bitreader asmparser irreader selectiondag Object
# If Intel JIT Events support is configured, link against the LLVM Intel JIT # If Intel JIT Events support is configured, link against the LLVM Intel JIT
# Events interface library. If not, this tool will do nothing useful, but it # Events interface library. If not, this tool will do nothing useful, but it
# will build correctly. # will build correctly.
ifeq ($(USE_INTEL_JITEVENTS), 1) ifeq ($(USE_INTEL_JITEVENTS), 1)
LINK_COMPONENTS += debuginfodwarf inteljitevents LINK_COMPONENTS += debuginfodwarf inteljitevents
endif endif
# This tool has no plugins, optimize startup time. # This tool has no plugins, optimize startup time.
TOOL_NO_EXPORTS := 1 TOOL_NO_EXPORTS := 1
include $(LLVM_SRC_ROOT)/Makefile.rules include $(LLVM_SRC_ROOT)/Makefile.rules