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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
change Target.getInstructionsByEnumValue to return a reference
to a vector that CGT stores instead of synthesizing it on every call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -845,8 +845,8 @@ void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) {
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// singleton register classes.
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std::set<std::string> SingletonRegisterNames;
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std::vector<const CodeGenInstruction*> InstrList;
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Target.getInstructionsByEnumValue(InstrList);
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const std::vector<const CodeGenInstruction*> &InstrList =
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Target.getInstructionsByEnumValue();
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for (unsigned i = 0, e = InstrList.size(); i != e; ++i) {
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const CodeGenInstruction &CGI = *InstrList[i];
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@ -263,7 +263,7 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
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AsmWriter->getValueAsInt("OperandSpacing")));
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// Get the instruction numbering.
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Target.getInstructionsByEnumValue(NumberedInstructions);
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NumberedInstructions = Target.getInstructionsByEnumValue();
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// Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
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// all machine instructions are necessarily being printed, so there may be
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@ -499,8 +499,8 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
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Record *AsmWriter = Target.getAsmWriter();
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std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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Target.getInstructionsByEnumValue(NumberedInstructions);
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const std::vector<const CodeGenInstruction*> &NumberedInstructions =
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Target.getInstructionsByEnumValue();
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StringToOffsetTable StringTable;
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O <<
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@ -86,8 +86,8 @@ void CodeEmitterGen::run(raw_ostream &o) {
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EmitSourceFileHeader("Machine Code Emitter", o);
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std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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Target.getInstructionsByEnumValue(NumberedInstructions);
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const std::vector<const CodeGenInstruction*> &NumberedInstructions =
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Target.getInstructionsByEnumValue();
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// Emit function declaration
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o << "unsigned " << Target.getName() << "CodeEmitter::"
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@ -95,7 +95,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
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// Emit instruction base values
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o << " static const unsigned InstBits[] = {\n";
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for (std::vector<const CodeGenInstruction*>::iterator
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for (std::vector<const CodeGenInstruction*>::const_iterator
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IN = NumberedInstructions.begin(),
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EN = NumberedInstructions.end();
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IN != EN; ++IN) {
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@ -2362,8 +2362,8 @@ void CodeGenDAGPatterns::AddPatternToMatch(const TreePattern *Pattern,
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void CodeGenDAGPatterns::InferInstructionFlags() {
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std::vector<const CodeGenInstruction*> Instructions;
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Target.getInstructionsByEnumValue(Instructions);
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const std::vector<const CodeGenInstruction*> &Instructions =
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Target.getInstructionsByEnumValue();
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
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CodeGenInstruction &InstInfo =
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const_cast<CodeGenInstruction &>(*Instructions[i]);
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@ -300,11 +300,8 @@ GetInstByName(const char *Name,
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/// getInstructionsByEnumValue - Return all of the instructions defined by the
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/// target, ordered by their enum value.
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void CodeGenTarget::
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getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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&NumberedInstructions) {
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void CodeGenTarget::ComputeInstrsByEnum() {
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const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
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const CodeGenInstruction *PHI = GetInstByName("PHI", Insts);
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const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts);
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const CodeGenInstruction *DBG_LABEL = GetInstByName("DBG_LABEL", Insts);
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@ -323,18 +320,18 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts);
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// Print out the rest of the instructions now.
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NumberedInstructions.push_back(PHI);
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NumberedInstructions.push_back(INLINEASM);
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NumberedInstructions.push_back(DBG_LABEL);
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NumberedInstructions.push_back(EH_LABEL);
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NumberedInstructions.push_back(GC_LABEL);
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NumberedInstructions.push_back(KILL);
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NumberedInstructions.push_back(EXTRACT_SUBREG);
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NumberedInstructions.push_back(INSERT_SUBREG);
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NumberedInstructions.push_back(IMPLICIT_DEF);
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NumberedInstructions.push_back(SUBREG_TO_REG);
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NumberedInstructions.push_back(COPY_TO_REGCLASS);
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NumberedInstructions.push_back(DBG_VALUE);
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InstrsByEnum.push_back(PHI);
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InstrsByEnum.push_back(INLINEASM);
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InstrsByEnum.push_back(DBG_LABEL);
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InstrsByEnum.push_back(EH_LABEL);
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InstrsByEnum.push_back(GC_LABEL);
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InstrsByEnum.push_back(KILL);
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InstrsByEnum.push_back(EXTRACT_SUBREG);
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InstrsByEnum.push_back(INSERT_SUBREG);
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InstrsByEnum.push_back(IMPLICIT_DEF);
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InstrsByEnum.push_back(SUBREG_TO_REG);
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InstrsByEnum.push_back(COPY_TO_REGCLASS);
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InstrsByEnum.push_back(DBG_VALUE);
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for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
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if (&II->second != PHI &&
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&II->second != INLINEASM &&
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@ -348,7 +345,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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&II->second != SUBREG_TO_REG &&
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&II->second != COPY_TO_REGCLASS &&
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&II->second != DBG_VALUE)
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NumberedInstructions.push_back(&II->second);
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InstrsByEnum.push_back(&II->second);
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}
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@ -70,6 +70,8 @@ class CodeGenTarget {
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void ReadRegisterClasses() const;
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void ReadInstructions() const;
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void ReadLegalValueTypes() const;
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std::vector<const CodeGenInstruction*> InstrsByEnum;
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public:
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CodeGenTarget();
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@ -210,13 +212,18 @@ public:
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/// getInstructionsByEnumValue - Return all of the instructions defined by the
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/// target, ordered by their enum value.
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void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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&NumberedInstructions);
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const std::vector<const CodeGenInstruction*> &getInstructionsByEnumValue() {
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if (InstrsByEnum.empty()) ComputeInstrsByEnum();
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return InstrsByEnum;
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}
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/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
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///
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bool isLittleEndianEncoding() const;
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private:
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void ComputeInstrsByEnum();
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};
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/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
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@ -108,8 +108,8 @@ void DisassemblerEmitter::run(raw_ostream &OS) {
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if (Target.getName() == "X86") {
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DisassemblerTables Tables;
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std::vector<const CodeGenInstruction*> numberedInstructions;
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Target.getInstructionsByEnumValue(numberedInstructions);
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const std::vector<const CodeGenInstruction*> &numberedInstructions =
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Target.getInstructionsByEnumValue();
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for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i)
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RecognizableInstr::processInstr(Tables, *numberedInstructions[i], i);
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@ -549,8 +549,8 @@ static void X86ExtractSemantics(FlagsConstantEmitter &instFlags,
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/// @arg target - The CodeGenTarget to use as a source of instructions
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static void populateInstInfo(CompoundConstantEmitter &infoArray,
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CodeGenTarget &target) {
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std::vector<const CodeGenInstruction*> numberedInstructions;
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target.getInstructionsByEnumValue(numberedInstructions);
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const std::vector<const CodeGenInstruction*> &numberedInstructions =
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target.getInstructionsByEnumValue();
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unsigned int index;
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unsigned int numInstructions = numberedInstructions.size();
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@ -40,8 +40,8 @@ void InstrEnumEmitter::run(raw_ostream &OS) {
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exit(1);
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}
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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Target.getInstructionsByEnumValue(NumberedInstructions);
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const std::vector<const CodeGenInstruction*> &NumberedInstructions =
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Target.getInstructionsByEnumValue();
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OS << "namespace " << Namespace << " {\n";
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OS << " enum {\n";
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@ -244,8 +244,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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//
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OS << "\nstatic const TargetInstrDesc " << TargetName
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<< "Insts[] = {\n";
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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Target.getInstructionsByEnumValue(NumberedInstructions);
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const std::vector<const CodeGenInstruction*> &NumberedInstructions =
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Target.getInstructionsByEnumValue();
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for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i)
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emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists,
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