From f65027842e82027dd6e8020586a299aaa548e355 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 19 Mar 2010 00:34:35 +0000 Subject: [PATCH] change Target.getInstructionsByEnumValue to return a reference to a vector that CGT stores instead of synthesizing it on every call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/AsmMatcherEmitter.cpp | 4 ++-- utils/TableGen/AsmWriterEmitter.cpp | 6 ++--- utils/TableGen/CodeEmitterGen.cpp | 6 ++--- utils/TableGen/CodeGenDAGPatterns.cpp | 4 ++-- utils/TableGen/CodeGenTarget.cpp | 31 ++++++++++++-------------- utils/TableGen/CodeGenTarget.h | 11 +++++++-- utils/TableGen/DisassemblerEmitter.cpp | 4 ++-- utils/TableGen/EDEmitter.cpp | 4 ++-- utils/TableGen/InstrEnumEmitter.cpp | 4 ++-- utils/TableGen/InstrInfoEmitter.cpp | 4 ++-- 10 files changed, 41 insertions(+), 37 deletions(-) diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 82b064ed33c..e5c068bcdf6 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -845,8 +845,8 @@ void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) { // singleton register classes. std::set SingletonRegisterNames; - std::vector InstrList; - Target.getInstructionsByEnumValue(InstrList); + const std::vector &InstrList = + Target.getInstructionsByEnumValue(); for (unsigned i = 0, e = InstrList.size(); i != e; ++i) { const CodeGenInstruction &CGI = *InstrList[i]; diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 3a38dd450ee..9378343cec7 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -263,7 +263,7 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { AsmWriter->getValueAsInt("OperandSpacing"))); // Get the instruction numbering. - Target.getInstructionsByEnumValue(NumberedInstructions); + NumberedInstructions = Target.getInstructionsByEnumValue(); // Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not // all machine instructions are necessarily being printed, so there may be @@ -499,8 +499,8 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) { Record *AsmWriter = Target.getAsmWriter(); std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName"); - std::vector NumberedInstructions; - Target.getInstructionsByEnumValue(NumberedInstructions); + const std::vector &NumberedInstructions = + Target.getInstructionsByEnumValue(); StringToOffsetTable StringTable; O << diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index a057dec7ce3..641c22433a1 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -86,8 +86,8 @@ void CodeEmitterGen::run(raw_ostream &o) { EmitSourceFileHeader("Machine Code Emitter", o); std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::"; - std::vector NumberedInstructions; - Target.getInstructionsByEnumValue(NumberedInstructions); + const std::vector &NumberedInstructions = + Target.getInstructionsByEnumValue(); // Emit function declaration o << "unsigned " << Target.getName() << "CodeEmitter::" @@ -95,7 +95,7 @@ void CodeEmitterGen::run(raw_ostream &o) { // Emit instruction base values o << " static const unsigned InstBits[] = {\n"; - for (std::vector::iterator + for (std::vector::const_iterator IN = NumberedInstructions.begin(), EN = NumberedInstructions.end(); IN != EN; ++IN) { diff --git a/utils/TableGen/CodeGenDAGPatterns.cpp b/utils/TableGen/CodeGenDAGPatterns.cpp index 8c07c4a80c2..bf4a7193452 100644 --- a/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/utils/TableGen/CodeGenDAGPatterns.cpp @@ -2362,8 +2362,8 @@ void CodeGenDAGPatterns::AddPatternToMatch(const TreePattern *Pattern, void CodeGenDAGPatterns::InferInstructionFlags() { - std::vector Instructions; - Target.getInstructionsByEnumValue(Instructions); + const std::vector &Instructions = + Target.getInstructionsByEnumValue(); for (unsigned i = 0, e = Instructions.size(); i != e; ++i) { CodeGenInstruction &InstInfo = const_cast(*Instructions[i]); diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index ea0746fa337..36a9d1ef923 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -300,11 +300,8 @@ GetInstByName(const char *Name, /// getInstructionsByEnumValue - Return all of the instructions defined by the /// target, ordered by their enum value. -void CodeGenTarget:: -getInstructionsByEnumValue(std::vector - &NumberedInstructions) { +void CodeGenTarget::ComputeInstrsByEnum() { const std::map &Insts = getInstructions(); - const CodeGenInstruction *PHI = GetInstByName("PHI", Insts); const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts); const CodeGenInstruction *DBG_LABEL = GetInstByName("DBG_LABEL", Insts); @@ -323,18 +320,18 @@ getInstructionsByEnumValue(std::vector const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts); // Print out the rest of the instructions now. - NumberedInstructions.push_back(PHI); - NumberedInstructions.push_back(INLINEASM); - NumberedInstructions.push_back(DBG_LABEL); - NumberedInstructions.push_back(EH_LABEL); - NumberedInstructions.push_back(GC_LABEL); - NumberedInstructions.push_back(KILL); - NumberedInstructions.push_back(EXTRACT_SUBREG); - NumberedInstructions.push_back(INSERT_SUBREG); - NumberedInstructions.push_back(IMPLICIT_DEF); - NumberedInstructions.push_back(SUBREG_TO_REG); - NumberedInstructions.push_back(COPY_TO_REGCLASS); - NumberedInstructions.push_back(DBG_VALUE); + InstrsByEnum.push_back(PHI); + InstrsByEnum.push_back(INLINEASM); + InstrsByEnum.push_back(DBG_LABEL); + InstrsByEnum.push_back(EH_LABEL); + InstrsByEnum.push_back(GC_LABEL); + InstrsByEnum.push_back(KILL); + InstrsByEnum.push_back(EXTRACT_SUBREG); + InstrsByEnum.push_back(INSERT_SUBREG); + InstrsByEnum.push_back(IMPLICIT_DEF); + InstrsByEnum.push_back(SUBREG_TO_REG); + InstrsByEnum.push_back(COPY_TO_REGCLASS); + InstrsByEnum.push_back(DBG_VALUE); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && @@ -348,7 +345,7 @@ getInstructionsByEnumValue(std::vector &II->second != SUBREG_TO_REG && &II->second != COPY_TO_REGCLASS && &II->second != DBG_VALUE) - NumberedInstructions.push_back(&II->second); + InstrsByEnum.push_back(&II->second); } diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index d48e49a8c51..ac6574d69ab 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -70,6 +70,8 @@ class CodeGenTarget { void ReadRegisterClasses() const; void ReadInstructions() const; void ReadLegalValueTypes() const; + + std::vector InstrsByEnum; public: CodeGenTarget(); @@ -210,13 +212,18 @@ public: /// getInstructionsByEnumValue - Return all of the instructions defined by the /// target, ordered by their enum value. - void getInstructionsByEnumValue(std::vector - &NumberedInstructions); + const std::vector &getInstructionsByEnumValue() { + if (InstrsByEnum.empty()) ComputeInstrsByEnum(); + return InstrsByEnum; + } /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? /// bool isLittleEndianEncoding() const; + +private: + void ComputeInstrsByEnum(); }; /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern diff --git a/utils/TableGen/DisassemblerEmitter.cpp b/utils/TableGen/DisassemblerEmitter.cpp index 61b9b1583b2..a195c0b8d6d 100644 --- a/utils/TableGen/DisassemblerEmitter.cpp +++ b/utils/TableGen/DisassemblerEmitter.cpp @@ -108,8 +108,8 @@ void DisassemblerEmitter::run(raw_ostream &OS) { if (Target.getName() == "X86") { DisassemblerTables Tables; - std::vector numberedInstructions; - Target.getInstructionsByEnumValue(numberedInstructions); + const std::vector &numberedInstructions = + Target.getInstructionsByEnumValue(); for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i) RecognizableInstr::processInstr(Tables, *numberedInstructions[i], i); diff --git a/utils/TableGen/EDEmitter.cpp b/utils/TableGen/EDEmitter.cpp index 214941071eb..f83ab486825 100644 --- a/utils/TableGen/EDEmitter.cpp +++ b/utils/TableGen/EDEmitter.cpp @@ -549,8 +549,8 @@ static void X86ExtractSemantics(FlagsConstantEmitter &instFlags, /// @arg target - The CodeGenTarget to use as a source of instructions static void populateInstInfo(CompoundConstantEmitter &infoArray, CodeGenTarget &target) { - std::vector numberedInstructions; - target.getInstructionsByEnumValue(numberedInstructions); + const std::vector &numberedInstructions = + target.getInstructionsByEnumValue(); unsigned int index; unsigned int numInstructions = numberedInstructions.size(); diff --git a/utils/TableGen/InstrEnumEmitter.cpp b/utils/TableGen/InstrEnumEmitter.cpp index d1e7f3dd35d..4162107bce9 100644 --- a/utils/TableGen/InstrEnumEmitter.cpp +++ b/utils/TableGen/InstrEnumEmitter.cpp @@ -40,8 +40,8 @@ void InstrEnumEmitter::run(raw_ostream &OS) { exit(1); } - std::vector NumberedInstructions; - Target.getInstructionsByEnumValue(NumberedInstructions); + const std::vector &NumberedInstructions = + Target.getInstructionsByEnumValue(); OS << "namespace " << Namespace << " {\n"; OS << " enum {\n"; diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 898c92af8da..83602bb65c4 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -244,8 +244,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) { // OS << "\nstatic const TargetInstrDesc " << TargetName << "Insts[] = {\n"; - std::vector NumberedInstructions; - Target.getInstructionsByEnumValue(NumberedInstructions); + const std::vector &NumberedInstructions = + Target.getInstructionsByEnumValue(); for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists,