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Don't use implicit register operands to calculate L-bit for AVX instructions. Needed because super reg defs and kills are added as implicit operands on 128-bit instructions. Fixes PR13349. Patch by Jose Fonseca.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160543 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-07-20 07:03:46 +00:00
parent 0fcaaafd1a
commit f654554ee0
1 changed files with 2 additions and 0 deletions
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2
lib/Target/X86/X86CodeEmitter.cpp
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@ -927,6 +927,8 @@ void Emitter<CodeEmitter>::emitVEXOpcodePrefix(uint64_t TSFlags,
for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
if (!MI.getOperand(i).isReg())
continue;
if (MI.getOperand(i).isImplicit())
continue;
unsigned SrcReg = MI.getOperand(i).getReg();
if (SrcReg >= X86::YMM0 && SrcReg <= X86::YMM15)
VEX_L = 1;