6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-24 23:28:41 +00:00
Code Issues Projects Releases Wiki Activity

Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2012-09-05 05:48:09 +00:00
parent f7e0ea6627
commit f6dc792df1
2 changed files with 66 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@@ -4874,7 +4874,21 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, DestVT,
getValue(I.getArgOperand(0)),
getValue(I.getArgOperand(1)),
DAG.getConstant(Idx, MVT::i32));
DAG.getIntPtrConstant(Idx));
setValue(&I, Res);
return 0;
}
case Intrinsic::x86_avx_vextractf128_pd_256:
case Intrinsic::x86_avx_vextractf128_ps_256:
case Intrinsic::x86_avx_vextractf128_si_256:
case Intrinsic::x86_avx2_vextracti128: {
DebugLoc dl = getCurDebugLoc();
EVT DestVT = TLI.getValueType(I.getType());
uint64_t Idx = (cast<ConstantInt>(I.getArgOperand(1))->getZExtValue() & 1) *
DestVT.getVectorNumElements();
Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT,
getValue(I.getArgOperand(0)),
DAG.getIntPtrConstant(Idx));
setValue(&I, Res);
return 0;
}