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https://github.com/c64scene-ar/llvm-6502.git
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The Mips standalone assembler fpu instruction support.
Test cases included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163363 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -27,6 +27,14 @@ namespace {
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class MipsAsmParser : public MCTargetAsmParser {
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enum FpFormatTy {
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FP_FORMAT_NONE = -1,
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FP_FORMAT_S,
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FP_FORMAT_D,
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FP_FORMAT_L,
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FP_FORMAT_W
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} FpFormat;
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MCSubtargetInfo &STI;
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MCAsmParser &Parser;
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@@ -42,6 +50,9 @@ class MipsAsmParser : public MCTargetAsmParser {
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bool ParseInstruction(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands);
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bool parseMathOperation(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands);
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bool ParseDirective(AsmToken DirectiveID);
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MipsAsmParser::OperandMatchResultTy
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@@ -63,14 +74,31 @@ class MipsAsmParser : public MCTargetAsmParser {
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bool parseMemOffset(const MCExpr *&Res);
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bool parseRelocOperand(const MCExpr *&Res);
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MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
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bool isMips64() const {
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return (STI.getFeatureBits() & Mips::FeatureMips64) != 0;
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}
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bool isFP64() const {
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return (STI.getFeatureBits() & Mips::FeatureFP64Bit) != 0;
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}
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int matchRegisterName(StringRef Symbol);
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int matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic);
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void setFpFormat(FpFormatTy Format) {
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FpFormat = Format;
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}
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void setDefaultFpFormat();
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void setFpFormat(StringRef Format);
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FpFormatTy getFpFormat() {return FpFormat;}
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bool requestsDoubleOperand(StringRef Mnemonic);
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unsigned getReg(int RC,int RegNo);
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public:
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@@ -327,8 +355,59 @@ int MipsAsmParser::matchRegisterName(StringRef Name) {
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return CC;
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}
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if (Name[0] == 'f') {
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StringRef NumString = Name.substr(1);
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unsigned IntVal;
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if( NumString.getAsInteger(10, IntVal))
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return -1; //not integer
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if (IntVal > 31)
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return -1;
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FpFormatTy Format = getFpFormat();
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if (Format == FP_FORMAT_S || Format == FP_FORMAT_W)
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return getReg(Mips::FGR32RegClassID, IntVal);
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if (Format == FP_FORMAT_D) {
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if(isFP64()) {
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return getReg(Mips::FGR64RegClassID, IntVal);
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}
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//only even numbers available as register pairs
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if (( IntVal > 31) || (IntVal%2 != 0))
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return -1;
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return getReg(Mips::AFGR64RegClassID, IntVal/2);
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}
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}
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return -1;
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}
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void MipsAsmParser::setDefaultFpFormat() {
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if (isMips64() || isFP64())
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FpFormat = FP_FORMAT_D;
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else
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FpFormat = FP_FORMAT_S;
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}
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bool MipsAsmParser::requestsDoubleOperand(StringRef Mnemonic){
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bool IsDouble = StringSwitch<bool>(Mnemonic.lower())
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.Case("ldxc1", true)
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.Case("ldc1", true)
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.Case("sdxc1", true)
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.Case("sdc1", true)
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.Default(false);
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return IsDouble;
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}
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void MipsAsmParser::setFpFormat(StringRef Format) {
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FpFormat = StringSwitch<FpFormatTy>(Format.lower())
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.Case(".s", FP_FORMAT_S)
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.Case(".d", FP_FORMAT_D)
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.Case(".l", FP_FORMAT_L)
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.Case(".w", FP_FORMAT_W)
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.Default(FP_FORMAT_NONE);
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}
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unsigned MipsAsmParser::getReg(int RC,int RegNo){
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return *(getContext().getRegisterInfo().getRegClass(RC).begin() + RegNo);
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@@ -359,6 +438,13 @@ int MipsAsmParser::tryParseRegister(StringRef Mnemonic) {
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} else if (Tok.is(AsmToken::Integer))
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RegNum = matchRegisterByNumber(static_cast<unsigned> (Tok.getIntVal()),
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Mnemonic.lower());
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else
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return RegNum; //error
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//64 bit div operations require Mips::ZERO instead of MIPS::ZERO_64
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if (isMips64() && RegNum == Mips::ZERO_64) {
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if (Mnemonic.find("ddiv") != StringRef::npos)
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RegNum = Mips::ZERO;
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}
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return RegNum;
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}
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@@ -368,12 +454,21 @@ bool MipsAsmParser::
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SMLoc S = Parser.getTok().getLoc();
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int RegNo = -1;
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RegNo = tryParseRegister(Mnemonic);
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//FIXME: we should make a more generic method for CCR
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if ((Mnemonic == "cfc1" || Mnemonic == "ctc1")
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&& Operands.size() == 2 && Parser.getTok().is(AsmToken::Integer)){
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RegNo = Parser.getTok().getIntVal(); //get the int value
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//at the moment only fcc0 is supported
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if (RegNo == 0)
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RegNo = Mips::FCC0;
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} else
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RegNo = tryParseRegister(Mnemonic);
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if (RegNo == -1)
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return true;
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Operands.push_back(MipsOperand::CreateReg(RegNo, S,
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Parser.getTok().getLoc()));
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Parser.getTok().getLoc()));
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Parser.Lex(); // Eat register token.
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return false;
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}
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@@ -550,9 +645,8 @@ bool MipsAsmParser::parseMemOffset(const MCExpr *&Res) {
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case AsmToken::Minus:
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case AsmToken::Plus:
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return (getParser().ParseExpression(Res));
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case AsmToken::Percent: {
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case AsmToken::Percent:
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return parseRelocOperand(Res);
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}
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case AsmToken::LParen:
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return false; //it's probably assuming 0
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}
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@@ -641,12 +735,131 @@ MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
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return VK;
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}
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int ConvertCcString(StringRef CondString){
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int CC = StringSwitch<unsigned>(CondString)
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.Case(".f", 0)
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.Case(".un", 1)
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.Case(".eq", 2)
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.Case(".ueq", 3)
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.Case(".olt", 4)
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.Case(".ult", 5)
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.Case(".ole", 6)
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.Case(".ule", 7)
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.Case(".sf", 8)
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.Case(".ngle", 9)
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.Case(".seq", 10)
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.Case(".ngl", 11)
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.Case(".lt", 12)
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.Case(".nge", 13)
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.Case(".le", 14)
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.Case(".ngt", 15)
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.Default(-1);
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return CC;
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}
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bool MipsAsmParser::
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parseMathOperation(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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//split the format
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size_t Start = Name.find('.'), Next = Name.rfind('.');
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StringRef Format1 = Name.slice(Start, Next);
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//and add the first format to the operands
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Operands.push_back(MipsOperand::CreateToken(Format1, NameLoc));
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//now for the second format
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StringRef Format2 = Name.slice(Next, StringRef::npos);
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Operands.push_back(MipsOperand::CreateToken(Format2, NameLoc));
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//set the format for the first register
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setFpFormat(Format1);
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// Read the remaining operands.
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if (getLexer().isNot(AsmToken::EndOfStatement)) {
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// Read the first operand.
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if (ParseOperand(Operands, Name)) {
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SMLoc Loc = getLexer().getLoc();
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Parser.EatToEndOfStatement();
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return Error(Loc, "unexpected token in argument list");
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}
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if (getLexer().isNot(AsmToken::Comma)) {
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SMLoc Loc = getLexer().getLoc();
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Parser.EatToEndOfStatement();
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return Error(Loc, "unexpected token in argument list");
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}
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Parser.Lex(); // Eat the comma.
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//set the format for the first register
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setFpFormat(Format2);
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// Parse and remember the operand.
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if (ParseOperand(Operands, Name)) {
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SMLoc Loc = getLexer().getLoc();
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Parser.EatToEndOfStatement();
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return Error(Loc, "unexpected token in argument list");
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}
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}
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if (getLexer().isNot(AsmToken::EndOfStatement)) {
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SMLoc Loc = getLexer().getLoc();
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Parser.EatToEndOfStatement();
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return Error(Loc, "unexpected token in argument list");
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}
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Parser.Lex(); // Consume the EndOfStatement
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return false;
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}
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bool MipsAsmParser::
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ParseInstruction(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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//first operand is a instruction mnemonic
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//floating point instructions: should register be treated as double?
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if (requestsDoubleOperand(Name)) {
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setFpFormat(FP_FORMAT_D);
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Operands.push_back(MipsOperand::CreateToken(Name, NameLoc));
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}
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else {
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setDefaultFpFormat();
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// Create the leading tokens for the mnemonic, split by '.' characters.
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size_t Start = 0, Next = Name.find('.');
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StringRef Mnemonic = Name.slice(Start, Next);
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Operands.push_back(MipsOperand::CreateToken(Mnemonic, NameLoc));
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if (Next != StringRef::npos) {
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//there is a format token in mnemonic
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//StringRef Rest = Name.slice(Next, StringRef::npos);
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size_t Dot = Name.find('.', Next+1);
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StringRef Format = Name.slice(Next, Dot);
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if (Dot == StringRef::npos) //only one '.' in a string, it's a format
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Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
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else {
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if (Name.startswith("c.")){
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// floating point compare, add '.' and immediate represent for cc
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Operands.push_back(MipsOperand::CreateToken(".", NameLoc));
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int Cc = ConvertCcString(Format);
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if (Cc == -1) {
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return Error(NameLoc, "Invalid conditional code");
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}
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SMLoc E = SMLoc::getFromPointer(
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Parser.getTok().getLoc().getPointer() -1 );
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Operands.push_back(MipsOperand::CreateImm(
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MCConstantExpr::Create(Cc, getContext()), NameLoc, E));
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} else {
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//trunc, ceil, floor ...
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return parseMathOperation(Name, NameLoc, Operands);
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}
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//the rest is a format
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Format = Name.slice(Dot, StringRef::npos);
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Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
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}
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setFpFormat(Format);
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}
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}
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// Read the remaining operands.
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if (getLexer().isNot(AsmToken::EndOfStatement)) {
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