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Use range-based for loops.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222782 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2014-11-25 20:11:31 +00:00
parent 5d7f978e91
commit f78e333712
2 changed files with 90 additions and 131 deletions
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213
utils/TableGen/AsmMatcherEmitter.cpp
View File

@@ -255,9 +255,8 @@ public:
return true; return true;
// ... or if any of its super classes are a subset of RHS. // ... or if any of its super classes are a subset of RHS.
for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(), for (const ClassInfo *CI : SuperClasses)
ie = SuperClasses.end(); it != ie; ++it) if (CI->isSubsetOf(RHS))
if ((*it)->isSubsetOf(RHS))
return true; return true;
return false; return false;
@@ -1087,15 +1086,12 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
RegisterSetSet RegisterSets; RegisterSetSet RegisterSets;
// Gather the defined sets. // Gather the defined sets.
for (ArrayRef<CodeGenRegisterClass*>::const_iterator it = for (const CodeGenRegisterClass *RC : RegClassList)
RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) RegisterSets.insert(RegisterSet(RC->getOrder().begin(),
RegisterSets.insert(RegisterSet( RC->getOrder().end()));
(*it)->getOrder().begin(), (*it)->getOrder().end()));
// Add any required singleton sets. // Add any required singleton sets.
for (SmallPtrSetImpl<Record*>::iterator it = SingletonRegisters.begin(), for (Record *Rec : SingletonRegisters) {
ie = SingletonRegisters.end(); it != ie; ++it) {
Record *Rec = *it;
RegisterSets.insert(RegisterSet(&Rec, &Rec + 1)); RegisterSets.insert(RegisterSet(&Rec, &Rec + 1));
} }
@@ -1103,19 +1099,16 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
// a unique register set class), and build the mapping of registers to the set // a unique register set class), and build the mapping of registers to the set
// they should classify to. // they should classify to.
std::map<Record*, RegisterSet> RegisterMap; std::map<Record*, RegisterSet> RegisterMap;
for (std::vector<CodeGenRegister*>::const_iterator it = Registers.begin(), for (const CodeGenRegister *CGR : Registers) {
ie = Registers.end(); it != ie; ++it) {
const CodeGenRegister &CGR = **it;
// Compute the intersection of all sets containing this register. // Compute the intersection of all sets containing this register.
RegisterSet ContainingSet; RegisterSet ContainingSet;
for (RegisterSetSet::iterator it = RegisterSets.begin(), for (const RegisterSet &RS : RegisterSets) {
ie = RegisterSets.end(); it != ie; ++it) { if (!RS.count(CGR->TheDef))
if (!it->count(CGR.TheDef))
continue; continue;
if (ContainingSet.empty()) { if (ContainingSet.empty()) {
ContainingSet = *it; ContainingSet = RS;
continue; continue;
} }
@@ -1123,21 +1116,20 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
std::swap(Tmp, ContainingSet); std::swap(Tmp, ContainingSet);
std::insert_iterator<RegisterSet> II(ContainingSet, std::insert_iterator<RegisterSet> II(ContainingSet,
ContainingSet.begin()); ContainingSet.begin());
std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II, std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II,
LessRecordByID()); LessRecordByID());
} }
if (!ContainingSet.empty()) { if (!ContainingSet.empty()) {
RegisterSets.insert(ContainingSet); RegisterSets.insert(ContainingSet);
RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet)); RegisterMap.insert(std::make_pair(CGR->TheDef, ContainingSet));
} }
} }
// Construct the register classes. // Construct the register classes.
std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses; std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses;
unsigned Index = 0; unsigned Index = 0;
for (RegisterSetSet::iterator it = RegisterSets.begin(), for (const RegisterSet &RS : RegisterSets) {
ie = RegisterSets.end(); it != ie; ++it, ++Index) {
ClassInfo *CI = new ClassInfo(); ClassInfo *CI = new ClassInfo();
CI->Kind = ClassInfo::RegisterClass0 + Index; CI->Kind = ClassInfo::RegisterClass0 + Index;
CI->ClassName = "Reg" + utostr(Index); CI->ClassName = "Reg" + utostr(Index);
@@ -1145,42 +1137,39 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
CI->ValueName = ""; CI->ValueName = "";
CI->PredicateMethod = ""; // unused CI->PredicateMethod = ""; // unused
CI->RenderMethod = "addRegOperands"; CI->RenderMethod = "addRegOperands";
CI->Registers = *it; CI->Registers = RS;
// FIXME: diagnostic type. // FIXME: diagnostic type.
CI->DiagnosticType = ""; CI->DiagnosticType = "";
Classes.push_back(CI); Classes.push_back(CI);
RegisterSetClasses.insert(std::make_pair(*it, CI)); RegisterSetClasses.insert(std::make_pair(RS, CI));
++Index;
} }
// Find the superclasses; we could compute only the subgroup lattice edges, // Find the superclasses; we could compute only the subgroup lattice edges,
// but there isn't really a point. // but there isn't really a point.
for (RegisterSetSet::iterator it = RegisterSets.begin(), for (const RegisterSet &RS : RegisterSets) {
ie = RegisterSets.end(); it != ie; ++it) { ClassInfo *CI = RegisterSetClasses[RS];
ClassInfo *CI = RegisterSetClasses[*it]; for (const RegisterSet &RS2 : RegisterSets)
for (RegisterSetSet::iterator it2 = RegisterSets.begin(), if (RS != RS2 &&
ie2 = RegisterSets.end(); it2 != ie2; ++it2) std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(),
if (*it != *it2 &&
std::includes(it2->begin(), it2->end(), it->begin(), it->end(),
LessRecordByID())) LessRecordByID()))
CI->SuperClasses.push_back(RegisterSetClasses[*it2]); CI->SuperClasses.push_back(RegisterSetClasses[RS2]);
} }
// Name the register classes which correspond to a user defined RegisterClass. // Name the register classes which correspond to a user defined RegisterClass.
for (ArrayRef<CodeGenRegisterClass*>::const_iterator for (const CodeGenRegisterClass *RC : RegClassList) {
it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) {
const CodeGenRegisterClass &RC = **it;
// Def will be NULL for non-user defined register classes. // Def will be NULL for non-user defined register classes.
Record *Def = RC.getDef(); Record *Def = RC->getDef();
if (!Def) if (!Def)
continue; continue;
ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(), ClassInfo *CI = RegisterSetClasses[RegisterSet(RC->getOrder().begin(),
RC.getOrder().end())]; RC->getOrder().end())];
if (CI->ValueName.empty()) { if (CI->ValueName.empty()) {
CI->ClassName = RC.getName(); CI->ClassName = RC->getName();
CI->Name = "MCK_" + RC.getName(); CI->Name = "MCK_" + RC->getName();
CI->ValueName = RC.getName(); CI->ValueName = RC->getName();
} else } else
CI->ValueName = CI->ValueName + "," + RC.getName(); CI->ValueName = CI->ValueName + "," + RC->getName();
RegisterClassClasses.insert(std::make_pair(Def, CI)); RegisterClassClasses.insert(std::make_pair(Def, CI));
} }
@@ -1191,9 +1180,7 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
RegisterClasses[it->first] = RegisterSetClasses[it->second]; RegisterClasses[it->first] = RegisterSetClasses[it->second];
// Name the register classes which correspond to singleton registers. // Name the register classes which correspond to singleton registers.
for (SmallPtrSetImpl<Record*>::iterator it = SingletonRegisters.begin(), for (Record *Rec : SingletonRegisters) {
ie = SingletonRegisters.end(); it != ie; ++it) {
Record *Rec = *it;
ClassInfo *CI = RegisterClasses[Rec]; ClassInfo *CI = RegisterClasses[Rec];
assert(CI && "Missing singleton register class info!"); assert(CI && "Missing singleton register class info!");
@@ -1211,36 +1198,34 @@ void AsmMatcherInfo::buildOperandClasses() {
Records.getAllDerivedDefinitions("AsmOperandClass"); Records.getAllDerivedDefinitions("AsmOperandClass");
// Pre-populate AsmOperandClasses map. // Pre-populate AsmOperandClasses map.
for (std::vector<Record*>::iterator it = AsmOperands.begin(), for (Record *Rec : AsmOperands)
ie = AsmOperands.end(); it != ie; ++it) AsmOperandClasses[Rec] = new ClassInfo();
AsmOperandClasses[*it] = new ClassInfo();
unsigned Index = 0; unsigned Index = 0;
for (std::vector<Record*>::iterator it = AsmOperands.begin(), for (Record *Rec : AsmOperands) {
ie = AsmOperands.end(); it != ie; ++it, ++Index) { ClassInfo *CI = AsmOperandClasses[Rec];
ClassInfo *CI = AsmOperandClasses[*it];
CI->Kind = ClassInfo::UserClass0 + Index; CI->Kind = ClassInfo::UserClass0 + Index;
ListInit *Supers = (*it)->getValueAsListInit("SuperClasses"); ListInit *Supers = Rec->getValueAsListInit("SuperClasses");
for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) { for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
DefInit *DI = dyn_cast<DefInit>(Supers->getElement(i)); DefInit *DI = dyn_cast<DefInit>(Supers->getElement(i));
if (!DI) { if (!DI) {
PrintError((*it)->getLoc(), "Invalid super class reference!"); PrintError(Rec->getLoc(), "Invalid super class reference!");
continue; continue;
} }
ClassInfo *SC = AsmOperandClasses[DI->getDef()]; ClassInfo *SC = AsmOperandClasses[DI->getDef()];
if (!SC) if (!SC)
PrintError((*it)->getLoc(), "Invalid super class reference!"); PrintError(Rec->getLoc(), "Invalid super class reference!");
else else
CI->SuperClasses.push_back(SC); CI->SuperClasses.push_back(SC);
} }
CI->ClassName = (*it)->getValueAsString("Name"); CI->ClassName = Rec->getValueAsString("Name");
CI->Name = "MCK_" + CI->ClassName; CI->Name = "MCK_" + CI->ClassName;
CI->ValueName = (*it)->getName(); CI->ValueName = Rec->getName();
// Get or construct the predicate method name. // Get or construct the predicate method name.
Init *PMName = (*it)->getValueInit("PredicateMethod"); Init *PMName = Rec->getValueInit("PredicateMethod");
if (StringInit *SI = dyn_cast<StringInit>(PMName)) { if (StringInit *SI = dyn_cast<StringInit>(PMName)) {
CI->PredicateMethod = SI->getValue(); CI->PredicateMethod = SI->getValue();
} else { } else {
@@ -1249,7 +1234,7 @@ void AsmMatcherInfo::buildOperandClasses() {
} }
// Get or construct the render method name. // Get or construct the render method name.
Init *RMName = (*it)->getValueInit("RenderMethod"); Init *RMName = Rec->getValueInit("RenderMethod");
if (StringInit *SI = dyn_cast<StringInit>(RMName)) { if (StringInit *SI = dyn_cast<StringInit>(RMName)) {
CI->RenderMethod = SI->getValue(); CI->RenderMethod = SI->getValue();
} else { } else {
@@ -1258,18 +1243,19 @@ void AsmMatcherInfo::buildOperandClasses() {
} }
// Get the parse method name or leave it as empty. // Get the parse method name or leave it as empty.
Init *PRMName = (*it)->getValueInit("ParserMethod"); Init *PRMName = Rec->getValueInit("ParserMethod");
if (StringInit *SI = dyn_cast<StringInit>(PRMName)) if (StringInit *SI = dyn_cast<StringInit>(PRMName))
CI->ParserMethod = SI->getValue(); CI->ParserMethod = SI->getValue();
// Get the diagnostic type or leave it as empty. // Get the diagnostic type or leave it as empty.
// Get the parse method name or leave it as empty. // Get the parse method name or leave it as empty.
Init *DiagnosticType = (*it)->getValueInit("DiagnosticType"); Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType)) if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
CI->DiagnosticType = SI->getValue(); CI->DiagnosticType = SI->getValue();
AsmOperandClasses[*it] = CI; AsmOperandClasses[Rec] = CI;
Classes.push_back(CI); Classes.push_back(CI);
++Index;
} }
} }
@@ -1344,20 +1330,18 @@ void AsmMatcherInfo::buildInfo() {
std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix"); std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix");
int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
for (CodeGenTarget::inst_iterator I = Target.inst_begin(), for (const CodeGenInstruction *CGI : Target.instructions()) {
E = Target.inst_end(); I != E; ++I) {
const CodeGenInstruction &CGI = **I;
// If the tblgen -match-prefix option is specified (for tblgen hackers), // If the tblgen -match-prefix option is specified (for tblgen hackers),
// filter the set of instructions we consider. // filter the set of instructions we consider.
if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix)) if (!StringRef(CGI->TheDef->getName()).startswith(MatchPrefix))
continue; continue;
// Ignore "codegen only" instructions. // Ignore "codegen only" instructions.
if (CGI.TheDef->getValueAsBit("isCodeGenOnly")) if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
continue; continue;
std::unique_ptr<MatchableInfo> II(new MatchableInfo(CGI)); std::unique_ptr<MatchableInfo> II(new MatchableInfo(*CGI));
II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix); II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
@@ -1411,10 +1395,7 @@ void AsmMatcherInfo::buildInfo() {
// Build the information about matchables, now that we have fully formed // Build the information about matchables, now that we have fully formed
// classes. // classes.
std::vector<MatchableInfo*> NewMatchables; std::vector<MatchableInfo*> NewMatchables;
for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(), for (MatchableInfo *II : Matchables) {
ie = Matchables.end(); it != ie; ++it) {
MatchableInfo *II = *it;
// Parse the tokens after the mnemonic. // Parse the tokens after the mnemonic.
// Note: buildInstructionOperandReference may insert new AsmOperands, so // Note: buildInstructionOperandReference may insert new AsmOperands, so
// don't precompute the loop bound. // don't precompute the loop bound.
@@ -1767,16 +1748,13 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
OperandConversionKinds.insert("CVT_Tied"); OperandConversionKinds.insert("CVT_Tied");
enum { CVT_Done, CVT_Reg, CVT_Tied }; enum { CVT_Done, CVT_Reg, CVT_Tied };
for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(), for (MatchableInfo *II : Infos) {
ie = Infos.end(); it != ie; ++it) {
MatchableInfo &II = **it;
// Check if we have a custom match function. // Check if we have a custom match function.
std::string AsmMatchConverter = std::string AsmMatchConverter =
II.getResultInst()->TheDef->getValueAsString("AsmMatchConverter"); II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
if (!AsmMatchConverter.empty()) { if (!AsmMatchConverter.empty()) {
std::string Signature = "ConvertCustom_" + AsmMatchConverter; std::string Signature = "ConvertCustom_" + AsmMatchConverter;
II.ConversionFnKind = Signature; II->ConversionFnKind = Signature;
// Check if we have already generated this signature. // Check if we have already generated this signature.
if (!InstructionConversionKinds.insert(Signature)) if (!InstructionConversionKinds.insert(Signature))
@@ -1808,16 +1786,17 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
std::vector<uint8_t> ConversionRow; std::vector<uint8_t> ConversionRow;
// Compute the convert enum and the case body. // Compute the convert enum and the case body.
MaxRowLength = std::max(MaxRowLength, II.ResOperands.size()*2 + 1 ); MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 );
for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) { for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) {
const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i]; const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i];
// Generate code to populate each result operand. // Generate code to populate each result operand.
switch (OpInfo.Kind) { switch (OpInfo.Kind) {
case MatchableInfo::ResOperand::RenderAsmOperand: { case MatchableInfo::ResOperand::RenderAsmOperand: {
// This comes from something we parsed. // This comes from something we parsed.
MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum]; const MatchableInfo::AsmOperand &Op =
II->AsmOperands[OpInfo.AsmOperandNum];
// Registers are always converted the same, don't duplicate the // Registers are always converted the same, don't duplicate the
// conversion function based on them. // conversion function based on them.
@@ -1940,7 +1919,7 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
if (Signature == "Convert") if (Signature == "Convert")
Signature += "_NoOperands"; Signature += "_NoOperands";
II.ConversionFnKind = Signature; II->ConversionFnKind = Signature;
// Save the signature. If we already have it, don't add a new row // Save the signature. If we already have it, don't add a new row
// to the table. // to the table.
@@ -2011,19 +1990,17 @@ static void emitMatchClassEnumeration(CodeGenTarget &Target,
<< "/// instruction matching.\n"; << "/// instruction matching.\n";
OS << "enum MatchClassKind {\n"; OS << "enum MatchClassKind {\n";
OS << " InvalidMatchClass = 0,\n"; OS << " InvalidMatchClass = 0,\n";
for (std::vector<ClassInfo*>::iterator it = Infos.begin(), for (const ClassInfo *CI : Infos) {
ie = Infos.end(); it != ie; ++it) { OS << " " << CI->Name << ", // ";
ClassInfo &CI = **it; if (CI->Kind == ClassInfo::Token) {
OS << " " << CI.Name << ", // "; OS << "'" << CI->ValueName << "'\n";
if (CI.Kind == ClassInfo::Token) { } else if (CI->isRegisterClass()) {
OS << "'" << CI.ValueName << "'\n"; if (!CI->ValueName.empty())
} else if (CI.isRegisterClass()) { OS << "register class '" << CI->ValueName << "'\n";
if (!CI.ValueName.empty())
OS << "register class '" << CI.ValueName << "'\n";
else else
OS << "derived register class\n"; OS << "derived register class\n";
} else { } else {
OS << "user defined class '" << CI.ValueName << "'\n"; OS << "user defined class '" << CI->ValueName << "'\n";
} }
} }
OS << " NumMatchClassKinds\n"; OS << " NumMatchClassKinds\n";
@@ -2053,20 +2030,17 @@ static void emitValidateOperandClass(AsmMatcherInfo &Info,
// Check the user classes. We don't care what order since we're only // Check the user classes. We don't care what order since we're only
// actually matching against one of them. // actually matching against one of them.
for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(), for (const ClassInfo *CI : Info.Classes) {
ie = Info.Classes.end(); it != ie; ++it) { if (!CI->isUserClass())
ClassInfo &CI = **it;
if (!CI.isUserClass())
continue; continue;
OS << " // '" << CI.ClassName << "' class\n"; OS << " // '" << CI->ClassName << "' class\n";
OS << " if (Kind == " << CI.Name << ") {\n"; OS << " if (Kind == " << CI->Name << ") {\n";
OS << " if (Operand." << CI.PredicateMethod << "())\n"; OS << " if (Operand." << CI->PredicateMethod << "())\n";
OS << " return MCTargetAsmParser::Match_Success;\n"; OS << " return MCTargetAsmParser::Match_Success;\n";
if (!CI.DiagnosticType.empty()) if (!CI->DiagnosticType.empty())
OS << " return " << Info.Target.getName() << "AsmParser::Match_" OS << " return " << Info.Target.getName() << "AsmParser::Match_"
<< CI.DiagnosticType << ";\n"; << CI->DiagnosticType << ";\n";
OS << " }\n\n"; OS << " }\n\n";
} }
@@ -2075,11 +2049,9 @@ static void emitValidateOperandClass(AsmMatcherInfo &Info,
OS << " MatchClassKind OpKind;\n"; OS << " MatchClassKind OpKind;\n";
OS << " switch (Operand.getReg()) {\n"; OS << " switch (Operand.getReg()) {\n";
OS << " default: OpKind = InvalidMatchClass; break;\n"; OS << " default: OpKind = InvalidMatchClass; break;\n";
for (AsmMatcherInfo::RegisterClassesTy::iterator for (const auto &RC : Info.RegisterClasses)
it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
it != ie; ++it)
OS << " case " << Info.Target.getName() << "::" OS << " case " << Info.Target.getName() << "::"
<< it->first->getName() << ": OpKind = " << it->second->Name << RC.first->getName() << ": OpKind = " << RC.second->Name
<< "; break;\n"; << "; break;\n";
OS << " }\n"; OS << " }\n";
OS << " return isSubclass(OpKind, Kind) ? " OS << " return isSubclass(OpKind, Kind) ? "
@@ -2107,24 +2079,18 @@ static void emitIsSubclass(CodeGenTarget &Target,
SS << " switch (A) {\n"; SS << " switch (A) {\n";
SS << " default:\n"; SS << " default:\n";
SS << " return false;\n"; SS << " return false;\n";
for (std::vector<ClassInfo*>::iterator it = Infos.begin(), for (const ClassInfo *A : Infos) {
ie = Infos.end(); it != ie; ++it) {
ClassInfo &A = **it;
std::vector<StringRef> SuperClasses; std::vector<StringRef> SuperClasses;
for (std::vector<ClassInfo*>::iterator it = Infos.begin(), for (const ClassInfo *B : Infos) {
ie = Infos.end(); it != ie; ++it) { if (A != B && A->isSubsetOf(*B))
ClassInfo &B = **it; SuperClasses.push_back(B->Name);
if (&A != &B && A.isSubsetOf(B))
SuperClasses.push_back(B.Name);
} }
if (SuperClasses.empty()) if (SuperClasses.empty())
continue; continue;
++Count; ++Count;
SS << "\n case " << A.Name << ":\n"; SS << "\n case " << A->Name << ":\n";
if (SuperClasses.size() == 1) { if (SuperClasses.size() == 1) {
SS << " return B == " << SuperClasses.back().str() << ";\n"; SS << " return B == " << SuperClasses.back().str() << ";\n";
@@ -2161,13 +2127,10 @@ static void emitMatchTokenString(CodeGenTarget &Target,
raw_ostream &OS) { raw_ostream &OS) {
// Construct the match list. // Construct the match list.
std::vector<StringMatcher::StringPair> Matches; std::vector<StringMatcher::StringPair> Matches;
for (std::vector<ClassInfo*>::iterator it = Infos.begin(), for (const ClassInfo *CI : Infos) {
ie = Infos.end(); it != ie; ++it) { if (CI->Kind == ClassInfo::Token)
ClassInfo &CI = **it; Matches.push_back(StringMatcher::StringPair(CI->ValueName,
"return " + CI->Name + ";"));
if (CI.Kind == ClassInfo::Token)
Matches.push_back(StringMatcher::StringPair(CI.ValueName,
"return " + CI.Name + ";"));
} }
OS << "static MatchClassKind matchTokenString(StringRef Name) {\n"; OS << "static MatchClassKind matchTokenString(StringRef Name) {\n";
@@ -2566,9 +2529,7 @@ static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
<< " &Operands,\n unsigned MCK) {\n\n" << " &Operands,\n unsigned MCK) {\n\n"
<< " switch(MCK) {\n"; << " switch(MCK) {\n";
for (std::vector<ClassInfo*>::const_iterator it = Info.Classes.begin(), for (const ClassInfo *CI : Info.Classes) {
ie = Info.Classes.end(); it != ie; ++it) {
ClassInfo *CI = *it;
if (CI->ParserMethod.empty()) if (CI->ParserMethod.empty())
continue; continue;
OS << " case " << CI->Name << ":\n" OS << " case " << CI->Name << ":\n"

8
utils/TableGen/AsmWriterEmitter.cpp
View File

@@ -1086,12 +1086,10 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) { AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
Record *AsmWriter = Target.getAsmWriter(); Record *AsmWriter = Target.getAsmWriter();
for (CodeGenTarget::inst_iterator I = Target.inst_begin(), for (const CodeGenInstruction *I : Target.instructions())
E = Target.inst_end(); if (!I->AsmString.empty() && I->TheDef->getName() != "PHI")
I != E; ++I)
if (!(*I)->AsmString.empty() && (*I)->TheDef->getName() != "PHI")
Instructions.push_back( Instructions.push_back(
AsmWriterInst(**I, AsmWriter->getValueAsInt("Variant"))); AsmWriterInst(*I, AsmWriter->getValueAsInt("Variant")));
// Get the instruction numbering. // Get the instruction numbering.
NumberedInstructions = &Target.getInstructionsByEnumValue(); NumberedInstructions = &Target.getInstructionsByEnumValue();