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Removed Mr. Smith from the code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24070 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey
2005-10-28 21:47:29 +00:00
parent fd306bfdd2
commit f7bcde0854
2 changed files with 143 additions and 171 deletions
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294
utils/TableGen/SubtargetEmitter.cpp
View File

@@ -19,72 +19,6 @@
#include <algorithm> #include <algorithm>
using namespace llvm; using namespace llvm;
//
// Convenience types.
//
typedef std::vector<Record*> RecordList;
//
// RecordListIter - Simplify iterating through a std::vector of records.
//
class RecordListIter {
std::vector<Record*>::iterator RI; // Currect cursor
std::vector<Record*>::iterator E; // End point
public:
//
// Ctor.
//
RecordListIter(RecordList &RL)
: RI(RL.begin()), E(RL.end())
{}
//
// isMore - Return true if more records are available.
//
bool isMore() const { return RI != E; }
//
// next - Return the next record or NULL if none.
//
Record *next() { return isMore() ? *RI++ : NULL; }
};
//
// DefListIter - Simplify iterating through a field which is a list of records.
//
struct DefListIter {
ListInit *List; // List of DefInit
unsigned N; // Number of elements in list
unsigned i; // Current index in list
//
// Ctor - Lookup field and get list and length.
//
DefListIter(Record *R, const std::string &Name)
: List(R->getValueAsListInit(Name)), N(List->getSize()), i(0)
{}
//
// isMore - Return true if more records are available.
//
bool isMore() const { return i < N; }
//
// next - Return the next record or NULL if none.
//
Record *next() {
if (isMore()) {
if (DefInit *DI = dynamic_cast<DefInit*>(List->getElement(i++))) {
return DI->getDef();
}
}
return NULL;
}
};
// //
// Record sort by name function. // Record sort by name function.
// //
@@ -110,27 +44,28 @@ void SubtargetEmitter::Enumeration(std::ostream &OS,
const char *ClassName, const char *ClassName,
bool isBits) { bool isBits) {
// Get all records of class and sort // Get all records of class and sort
RecordList Defs = Records.getAllDerivedDefinitions(ClassName); std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
sort(Defs.begin(), Defs.end(), LessRecord()); sort(DefList.begin(), DefList.end(), LessRecord());
// Track position if isBits
int i = 0;
// Open enumeration // Open enumeration
OS << "enum {\n"; OS << "enum {\n";
// For each record // For each record
RecordListIter DI(Defs); for (unsigned i = 0, N = DefList.size(); i < N;) {
while (Record *R = DI.next()) { // Next record
Record *Def = DefList[i];
// Get and emit name // Get and emit name
std::string Name = R->getName(); std::string Name = Def->getName();
OS << " " << Name; OS << " " << Name;
// If bit flags then emit expression (1 << i) // If bit flags then emit expression (1 << i)
if (isBits) OS << " = " << " 1 << " << i++; if (isBits) OS << " = " << " 1 << " << i;
// Depending on if more in the list, emit comma and new line // Depending on if more in the list emit comma
OS << (DI.isMore() ? ",\n" : "\n"); if (++i < N) OS << ",";
OS << "\n";
} }
// Close enumeration // Close enumeration
@@ -143,26 +78,34 @@ void SubtargetEmitter::Enumeration(std::ostream &OS,
// //
void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) { void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
// Gather and sort all the features // Gather and sort all the features
RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature"); std::vector<Record*> FeatureList =
sort(Features.begin(), Features.end(), LessRecord()); Records.getAllDerivedDefinitions("SubtargetFeature");
sort(FeatureList.begin(), FeatureList.end(), LessRecord());
// Begin feature table // Begin feature table
OS << "// Sorted (by key) array of values for CPU features.\n" OS << "// Sorted (by key) array of values for CPU features.\n"
<< "static llvm::SubtargetFeatureKV FeatureKV[] = {\n"; << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
// For each feature // For each feature
RecordListIter FI(Features); for (unsigned i = 0, N = FeatureList.size(); i < N;) {
while (Record *R = FI.next()) { // Next feature
std::string Instance = R->getName(); Record *Feature = FeatureList[i];
std::string Name = R->getValueAsString("Name");
std::string Desc = R->getValueAsString("Desc"); std::string Name = Feature->getName();
std::string CommandLineName = Feature->getValueAsString("Name");
std::string Desc = Feature->getValueAsString("Desc");
// Emit as { "feature", "decription", feactureEnum } // Emit as { "feature", "decription", feactureEnum }
OS << " { " OS << " { "
<< "\"" << Name << "\", " << "\"" << CommandLineName << "\", "
<< "\"" << Desc << "\", " << "\"" << Desc << "\", "
<< Instance << Name
<< (FI.isMore() ? " },\n" : " }\n"); << " }";
// Depending on if more in the list emit comma
if (++i < N) OS << ",";
OS << "\n";
} }
// End feature table // End feature table
@@ -180,35 +123,44 @@ void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
// //
void SubtargetEmitter::CPUKeyValues(std::ostream &OS) { void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
// Gather and sort processor information // Gather and sort processor information
RecordList Processors = Records.getAllDerivedDefinitions("Processor"); std::vector<Record*> ProcessorList =
sort(Processors.begin(), Processors.end(), LessRecordFieldName()); Records.getAllDerivedDefinitions("Processor");
sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
// Begin processor table // Begin processor table
OS << "// Sorted (by key) array of values for CPU subtype.\n" OS << "// Sorted (by key) array of values for CPU subtype.\n"
<< "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n"; << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
// For each processor // For each processor
RecordListIter PI(Processors); for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
while (Record *R = PI.next()) { // Next processor
std::string Name = R->getValueAsString("Name"); Record *Processor = ProcessorList[i];
DefListIter FI(R, "Features");
std::string Name = Processor->getValueAsString("Name");
std::vector<Record*> FeatureList = Processor->getValueAsListDef("Features");
// Emit as { "cpu", "description", f1 | f2 | ... fn }, // Emit as { "cpu", "description", f1 | f2 | ... fn },
OS << " { " OS << " { "
<< "\"" << Name << "\", " << "\"" << Name << "\", "
<< "\"Select the " << Name << " processor\", "; << "\"Select the " << Name << " processor\", ";
if (!FI.isMore()) { if (FeatureList.empty()) {
OS << "0"; OS << "0";
} else { } else {
while (Record *Feature = FI.next()) { for (unsigned j = 0, M = FeatureList.size(); j < M;) {
Record *Feature = FeatureList[j];
std::string Name = Feature->getName(); std::string Name = Feature->getName();
OS << Name; OS << Name;
if (FI.isMore()) OS << " | "; if (++j < M) OS << " | ";
} }
} }
OS << (PI.isMore() ? " },\n" : " }\n"); OS << " }";
// Depending on if more in the list emit comma
if (++i < N) OS << ",";
OS << "\n";
} }
// End processor table // End processor table
@@ -224,25 +176,26 @@ void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
// CollectAllItinClasses - Gathers and enumerates all the itinerary classes. // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
// Returns itinerary class count. // Returns itinerary class count.
// //
unsigned SubtargetEmitter::CollectAllItinClasses(IntMap &ItinClassesMap) { unsigned SubtargetEmitter::CollectAllItinClasses(std::map<std::string, unsigned>
&ItinClassesMap) {
// Gather and sort all itinerary classes // Gather and sort all itinerary classes
RecordList ICL = Records.getAllDerivedDefinitions("InstrItinClass"); std::vector<Record*> ItinClassList =
sort(ICL.begin(), ICL.end(), LessRecord()); Records.getAllDerivedDefinitions("InstrItinClass");
sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
// Track enumeration // For each itinerary class
unsigned Index = 0; unsigned N = ItinClassList.size();
for (unsigned i = 0; i < N; i++) {
// For each class // Next itinerary class
RecordListIter ICI(ICL); Record *ItinClass = ItinClassList[i];
while (Record *ItinClass = ICI.next()) {
// Get name of itinerary class // Get name of itinerary class
std::string Name = ItinClass->getName(); std::string Name = ItinClass->getName();
// Assign itinerary class a unique number // Assign itinerary class a unique number
ItinClassesMap[Name] = Index++; ItinClassesMap[Name] = i;
} }
// Return itinerary class count // Return itinerary class count
return Index; return N;
} }
// //
@@ -251,24 +204,31 @@ unsigned SubtargetEmitter::CollectAllItinClasses(IntMap &ItinClassesMap) {
// //
void SubtargetEmitter::FormItineraryString(Record *ItinData, void SubtargetEmitter::FormItineraryString(Record *ItinData,
std::string &ItinString, std::string &ItinString,
unsigned &N) { unsigned &NStages) {
// Set up stages iterator // Get states list
DefListIter SLI(ItinData, "Stages"); std::vector<Record*> StageList = ItinData->getValueAsListDef("Stages");
// Get stage count
N = SLI.N;
// For each stage // For each stage
while (Record *Stage = SLI.next()) { unsigned N = NStages = StageList.size();
for (unsigned i = 0; i < N; i++) {
// Next stage
Record *Stage = StageList[i];
// Form string as ,{ cycles, u1 | u2 | ... | un } // Form string as ,{ cycles, u1 | u2 | ... | un }
int Cycles = Stage->getValueAsInt("Cycles"); int Cycles = Stage->getValueAsInt("Cycles");
ItinString += " ,{ " + itostr(Cycles) + ", "; ItinString += " ,{ " + itostr(Cycles) + ", ";
// Get unit list
std::vector<Record*> UnitList = Stage->getValueAsListDef("Units");
// For each unit // For each unit
DefListIter ULI(Stage, "Units"); for (unsigned j = 0, M = UnitList.size(); j < M;) {
while (Record *Unit = ULI.next()) { // Next unit
std::string Name = Unit->getName(); Record *Unit = UnitList[j];
ItinString += Name;
if (ULI.isMore())ItinString += " | "; // Add name and bitwise or
ItinString += Unit->getName();
if (++j < M) ItinString += " | ";
} }
// Close off stage // Close off stage
@@ -281,40 +241,48 @@ void SubtargetEmitter::FormItineraryString(Record *ItinData,
// processors. // processors.
// //
void SubtargetEmitter::EmitStageData(std::ostream &OS, void SubtargetEmitter::EmitStageData(std::ostream &OS,
unsigned N, unsigned NItinClasses,
IntMap &ItinClassesMap, std::map<std::string, unsigned> &ItinClassesMap,
ProcessorList &ProcList) { std::vector<std::vector<InstrItinerary> > &ProcList) {
// Gather processor iteraries // Gather processor iteraries
RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries"); std::vector<Record*> ProcItinList =
Records.getAllDerivedDefinitions("ProcessorItineraries");
// If just no itinerary then don't bother // If just no itinerary then don't bother
if (Itins.size() < 2) return; if (ProcItinList.size() < 2) return;
// Begin stages table // Begin stages table
OS << "static llvm::InstrStage Stages[] = {\n" OS << "static llvm::InstrStage Stages[] = {\n"
" { 0, 0 } // No itinerary\n"; " { 0, 0 } // No itinerary\n";
IntMap ItinMap; unsigned ItinEnum = 1;
unsigned Index = 1; std::map<std::string, unsigned> ItinMap;
RecordListIter II(Itins); for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
while (Record *Itin = II.next()) { // Next record
Record *Proc = ProcItinList[i];
// Get processor itinerary name // Get processor itinerary name
std::string Name = Itin->getName(); std::string Name = Proc->getName();
// Skip default // Skip default
if (Name == "NoItineraries") continue; if (Name == "NoItineraries") continue;
// Create and expand processor itinerary to cover all itinerary classes // Create and expand processor itinerary to cover all itinerary classes
IntineraryList IL; std::vector<InstrItinerary> ItinList;
IL.resize(N); ItinList.resize(NItinClasses);
// For each itinerary // Get itinerary data list
DefListIter IDLI(Itin, "IID"); std::vector<Record*> ItinDataList = Proc->getValueAsListDef("IID");
while (Record *ItinData = IDLI.next()) {
// For each itinerary data
for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
// Next itinerary data
Record *ItinData = ItinDataList[j];
// Get string and stage count // Get string and stage count
std::string ItinString; std::string ItinString;
unsigned M; unsigned NStages;
FormItineraryString(ItinData, ItinString, M); FormItineraryString(ItinData, ItinString, NStages);
// Check to see if it already exists // Check to see if it already exists
unsigned Find = ItinMap[ItinString]; unsigned Find = ItinMap[ItinString];
@@ -322,23 +290,23 @@ void SubtargetEmitter::EmitStageData(std::ostream &OS,
// If new itinerary // If new itinerary
if (Find == 0) { if (Find == 0) {
// Emit as ,{ cycles, u1 | u2 | ... | un } // index // Emit as ,{ cycles, u1 | u2 | ... | un } // index
OS << ItinString << " // " << Index << "\n"; OS << ItinString << " // " << ItinEnum << "\n";
ItinMap[ItinString] = Find = Index++; ItinMap[ItinString] = Find = ItinEnum++;
} }
// Set up itinerary as location and location + stage count // Set up itinerary as location and location + stage count
InstrItinerary Intinerary = { Find, Find + M }; InstrItinerary Intinerary = { Find, Find + NStages };
// Locate where to inject into processor itinerary table // Locate where to inject into processor itinerary table
std::string Name = ItinData->getValueAsDef("TheClass")->getName(); std::string Name = ItinData->getValueAsDef("TheClass")->getName();
Find = ItinClassesMap[Name]; Find = ItinClassesMap[Name];
// Inject - empty slots will be 0, 0 // Inject - empty slots will be 0, 0
IL[Find] = Intinerary; ItinList[Find] = Intinerary;
} }
// Add process itinerary to list // Add process itinerary to list
ProcList.push_back(IL); ProcList.push_back(ItinList);
} }
// End stages table // End stages table
@@ -349,14 +317,18 @@ void SubtargetEmitter::EmitStageData(std::ostream &OS,
// EmitProcessData - Generate data for processor itineraries. // EmitProcessData - Generate data for processor itineraries.
// //
void SubtargetEmitter::EmitProcessData(std::ostream &OS, void SubtargetEmitter::EmitProcessData(std::ostream &OS,
ProcessorList &ProcList) { std::vector<std::vector<InstrItinerary> > &ProcList) {
// Get an iterator for processor itinerary stages // Get an iterator for processor itinerary stages
ProcessorList::iterator PLI = ProcList.begin(); std::vector<std::vector<InstrItinerary> >::iterator
ProcListIter = ProcList.begin();
// For each processor itinerary // For each processor itinerary
RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries"); std::vector<Record*> Itins =
RecordListIter II(Itins); Records.getAllDerivedDefinitions("ProcessorItineraries");
while (Record *Itin = II.next()) { for (unsigned i = 0, N = Itins.size(); i < N; i++) {
// Next record
Record *Itin = Itins[i];
// Get processor itinerary name // Get processor itinerary name
std::string Name = Itin->getName(); std::string Name = Itin->getName();
@@ -368,10 +340,10 @@ void SubtargetEmitter::EmitProcessData(std::ostream &OS,
OS << "static llvm::InstrItinerary " << Name << "[] = {\n"; OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
// For each itinerary class // For each itinerary class
IntineraryList &IL = *PLI++; std::vector<InstrItinerary> &ItinList = *ProcListIter++;
unsigned Index = 0; unsigned ItinIndex = 0;
for (IntineraryList::iterator ILI = IL.begin(), E = IL.end(); ILI != E;) { for (unsigned j = 0, M = ItinList.size(); j < M;) {
InstrItinerary &Intinerary = *ILI++; InstrItinerary &Intinerary = ItinList[j];
// Emit in the form of { first, last } // index // Emit in the form of { first, last } // index
if (Intinerary.First == 0) { if (Intinerary.First == 0) {
@@ -380,8 +352,10 @@ void SubtargetEmitter::EmitProcessData(std::ostream &OS,
OS << " { " << Intinerary.First << ", " << Intinerary.Last << " }"; OS << " { " << Intinerary.First << ", " << Intinerary.Last << " }";
} }
if (ILI != E) OS << ","; // If more in list add comma
OS << " // " << Index++ << "\n"; if (++j < M) OS << ",";
OS << " // " << (j - 1) << "\n";
} }
// End processor itinerary table // End processor itinerary table
@@ -393,13 +367,13 @@ void SubtargetEmitter::EmitProcessData(std::ostream &OS,
// EmitData - Emits all stages and itineries, folding common patterns. // EmitData - Emits all stages and itineries, folding common patterns.
// //
void SubtargetEmitter::EmitData(std::ostream &OS) { void SubtargetEmitter::EmitData(std::ostream &OS) {
IntMap ItinClassesMap; std::map<std::string, unsigned> ItinClassesMap;
ProcessorList ProcList; std::vector<std::vector<InstrItinerary> > ProcList;
// Enumerate all the itinerary classes // Enumerate all the itinerary classes
unsigned N = CollectAllItinClasses(ItinClassesMap); unsigned NItinClasses = CollectAllItinClasses(ItinClassesMap);
// Emit the stage data // Emit the stage data
EmitStageData(OS, N, ItinClassesMap, ProcList); EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
// Emit the processor itinerary data // Emit the processor itinerary data
EmitProcessData(OS, ProcList); EmitProcessData(OS, ProcList);
} }
@@ -409,7 +383,8 @@ void SubtargetEmitter::EmitData(std::ostream &OS) {
// the subtarget features string. // the subtarget features string.
// //
void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) { void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature"); std::vector<Record*> Features =
Records.getAllDerivedDefinitions("SubtargetFeature");
sort(Features.begin(), Features.end(), LessRecord()); sort(Features.begin(), Features.end(), LessRecord());
OS << "// ParseSubtargetFeatures - Parses features string setting specified\n" OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
@@ -423,8 +398,9 @@ void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
" uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n" " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
" FeatureKV, FeatureKVSize);\n"; " FeatureKV, FeatureKVSize);\n";
RecordListIter FI(Features); for (unsigned i = 0; i < Features.size(); i++) {
while (Record *R = FI.next()) { // Next record
Record *R = Features[i];
std::string Instance = R->getName(); std::string Instance = R->getName();
std::string Name = R->getValueAsString("Name"); std::string Name = R->getValueAsString("Name");
std::string Type = R->getValueAsString("Type"); std::string Type = R->getValueAsString("Type");

20
utils/TableGen/SubtargetEmitter.h
View File

@@ -23,13 +23,6 @@
namespace llvm { namespace llvm {
//
// Convenience types.
//
typedef std::map<std::string, unsigned> IntMap;
typedef std::vector<InstrItinerary> IntineraryList;
typedef std::vector<IntineraryList> ProcessorList;
class SubtargetEmitter : public TableGenBackend { class SubtargetEmitter : public TableGenBackend {
RecordKeeper &Records; RecordKeeper &Records;
@@ -38,12 +31,15 @@ class SubtargetEmitter : public TableGenBackend {
void Enumeration(std::ostream &OS, const char *ClassName, bool isBits); void Enumeration(std::ostream &OS, const char *ClassName, bool isBits);
void FeatureKeyValues(std::ostream &OS); void FeatureKeyValues(std::ostream &OS);
void CPUKeyValues(std::ostream &OS); void CPUKeyValues(std::ostream &OS);
unsigned CollectAllItinClasses(IntMap &ItinClassesMap); unsigned CollectAllItinClasses(std::map<std::string, unsigned>
&ItinClassesMap);
void FormItineraryString(Record *ItinData, std::string &ItinString, void FormItineraryString(Record *ItinData, std::string &ItinString,
unsigned &N); unsigned &NStages);
void EmitStageData(std::ostream &OS, unsigned N, void EmitStageData(std::ostream &OS, unsigned NItinClasses,
IntMap &ItinClassesMap, ProcessorList &ProcList); std::map<std::string, unsigned> &ItinClassesMap,
void EmitProcessData(std::ostream &OS, ProcessorList &ProcList); std::vector<std::vector<InstrItinerary> > &ProcList);
void EmitProcessData(std::ostream &OS,
std::vector<std::vector<InstrItinerary> > &ProcList);
void EmitData(std::ostream &OS); void EmitData(std::ostream &OS);
void ParseFeaturesFunction(std::ostream &OS); void ParseFeaturesFunction(std::ostream &OS);