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Take advantage of the recent improvements to the liveintervals set (tracking
instructions which define each value#) to simplify and improve the coallescer. In particular, this patch: 1. Implements iterative coallescing. 2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a better solution. 3. Implements PR865, "coallescing" away the second copy in code like: A = B ... B = A This also includes changes to symbolically print registers in intervals when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29862 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
4869d7fa8e
commit
f7da2c7b0c
@ -82,7 +82,7 @@ namespace llvm {
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/// InstDefiningValue - This tracks the def index of the instruction that
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/// defines a particular value number in the interval. This may be ~0,
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/// which is treated as unknown.
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/// which is treated as unknown, or ~1, which is a deleted value number.
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SmallVector<unsigned, 4> InstDefiningValue;
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public:
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@ -116,10 +116,13 @@ namespace llvm {
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std::swap(weight, other.weight);
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std::swap(ranges, other.ranges);
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std::swap(NumValues, other.NumValues);
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std::swap(InstDefiningValue, other.InstDefiningValue);
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}
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bool containsOneValue() const { return NumValues == 1; }
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unsigned getNumValNums() const { return NumValues; }
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/// getNextValue - Create a new value number and return it. MIIdx specifies
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/// the instruction that defines the value number.
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unsigned getNextValue(unsigned MIIdx) {
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@ -138,6 +141,12 @@ namespace llvm {
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void setInstDefiningValNum(unsigned ValNo, unsigned MIIdx) {
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InstDefiningValue[ValNo] = MIIdx;
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}
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/// MergeValueNumberInto - This method is called when two value nubmers
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/// are found to be equivalent. This eliminates V1, replacing all
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/// LiveRanges with the V1 value number with the V2 value number. This can
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/// cause merging of V1/V2 values numbers and compaction of the value space.
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void MergeValueNumberInto(unsigned V1, unsigned V2);
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bool empty() const { return ranges.empty(); }
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@ -163,9 +172,19 @@ namespace llvm {
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/// getLiveRangeContaining - Return the live range that contains the
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/// specified index, or null if there is none.
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const LiveRange *getLiveRangeContaining(unsigned Idx) const;
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const LiveRange *getLiveRangeContaining(unsigned Idx) const {
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const_iterator I = FindLiveRangeContaining(Idx);
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return I == end() ? 0 : &*I;
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}
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/// FindLiveRangeContaining - Return an iterator to the live range that
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/// contains the specified index, or end() if there is none.
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const_iterator FindLiveRangeContaining(unsigned Idx) const;
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/// FindLiveRangeContaining - Return an iterator to the live range that
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/// contains the specified index, or end() if there is none.
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iterator FindLiveRangeContaining(unsigned Idx);
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/// joinable - Two intervals are joinable if the either don't overlap at all
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/// or if the destination of the copy is a single assignment value, and it
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/// only overlaps with one value in the source interval.
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@ -53,8 +53,18 @@ namespace llvm {
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std::vector<bool> allocatableRegs_;
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public:
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struct InstrSlots
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{
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struct CopyRec {
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MachineInstr *MI;
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unsigned SrcReg, DstReg;
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};
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CopyRec getCopyRec(MachineInstr *MI, unsigned SrcReg, unsigned DstReg) {
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CopyRec R;
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R.MI = MI;
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R.SrcReg = SrcReg;
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R.DstReg = DstReg;
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return R;
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}
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struct InstrSlots {
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enum {
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LOAD = 0,
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USE = 1,
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@ -133,16 +143,37 @@ namespace llvm {
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virtual void print(std::ostream &O, const Module* = 0) const;
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private:
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/// RemoveMachineInstrFromMaps - This marks the specified machine instr as
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/// deleted.
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void RemoveMachineInstrFromMaps(MachineInstr *MI) {
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// remove index -> MachineInstr and
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// MachineInstr -> index mappings
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Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
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if (mi2i != mi2iMap_.end()) {
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i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
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mi2iMap_.erase(mi2i);
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}
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}
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/// computeIntervals - compute live intervals
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// joinIntervalsInMachineBB - Join intervals based on move
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/// instructions in the specified basic block.
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void joinIntervalsInMachineBB(MachineBasicBlock *MBB);
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/// CopyCoallesceInMBB - Coallsece copies in the specified MBB, putting
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/// copies that cannot yet be coallesced into the "TryAgain" list.
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void CopyCoallesceInMBB(MachineBasicBlock *MBB,
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std::vector<CopyRec> &TryAgain);
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/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// which are the src/dst of the copy instruction CopyMI. This returns true
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/// if the copy was successfully coallesced away, or if it is never possible
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/// to coallesce these this copy, due to register constraints. It returns
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/// false if it is not currently possible to coallesce this interval, but
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/// it may be possible if other things get coallesced.
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bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg);
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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/// handleVirtualRegisterDef)
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@ -157,14 +188,10 @@ namespace llvm {
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LiveInterval& interval);
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/// handlePhysicalRegisterDef - update intervals for a physical register
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/// def. If the defining instruction is a move instruction, SrcReg will be
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/// the input register, and DestReg will be the result. Note that Interval
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/// may not match DestReg (it might be an alias instead).
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///
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/// def.
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void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval,
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unsigned SrcReg, unsigned DestReg,
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bool isLiveIn = false);
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/// Return true if the two specified registers belong to different
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@ -172,9 +199,8 @@ namespace llvm {
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bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
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bool AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
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LiveInterval &IntB,
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unsigned CopyIdx);
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bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
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MachineInstr *CopyMI, unsigned CopyIdx);
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bool overlapsAliases(const LiveInterval *lhs,
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const LiveInterval *rhs) const;
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@ -346,18 +346,29 @@ void LiveInterval::removeRange(unsigned Start, unsigned End) {
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/// getLiveRangeContaining - Return the live range that contains the
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/// specified index, or null if there is none.
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const LiveRange *LiveInterval::getLiveRangeContaining(unsigned Idx) const {
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Ranges::const_iterator It = std::upper_bound(ranges.begin(),ranges.end(),Idx);
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LiveInterval::const_iterator
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LiveInterval::FindLiveRangeContaining(unsigned Idx) const {
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const_iterator It = std::upper_bound(begin(), end(), Idx);
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if (It != ranges.begin()) {
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const LiveRange &LR = *prior(It);
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if (LR.contains(Idx))
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return &LR;
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--It;
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if (It->contains(Idx))
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return It;
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}
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return 0;
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return end();
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}
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LiveInterval::iterator
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LiveInterval::FindLiveRangeContaining(unsigned Idx) {
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iterator It = std::upper_bound(begin(), end(), Idx);
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if (It != ranges.begin()) {
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--It;
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if (It->contains(Idx))
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return It;
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}
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return end();
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}
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/// join - Join two live intervals (this, and other) together. This operation
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/// is the result of a copy instruction in the source program, that occurs at
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@ -376,6 +387,7 @@ void LiveInterval::join(LiveInterval &Other, unsigned CopyIdx) {
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std::swap(MergedSrcValIdx, MergedDstValIdx);
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std::swap(ranges, Other.ranges);
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std::swap(NumValues, Other.NumValues);
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std::swap(InstDefiningValue, Other.InstDefiningValue);
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}
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// Join the ranges of other into the ranges of this interval.
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@ -394,10 +406,73 @@ void LiveInterval::join(LiveInterval &Other, unsigned CopyIdx) {
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InsertPos = addRangeFrom(*I, InsertPos);
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}
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// Update the value number information for the value number defined by the
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// copy. The copy is about to be removed, so ensure that the value is defined
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// by whatever the other value is defined by.
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if (InstDefiningValue[MergedDstValIdx] == CopyIdx) {
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InstDefiningValue[MergedDstValIdx] =
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Other.InstDefiningValue[MergedSrcValIdx];
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}
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weight += Other.weight;
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}
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/// MergeValueNumberInto - This method is called when two value nubmers
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/// are found to be equivalent. This eliminates V1, replacing all
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/// LiveRanges with the V1 value number with the V2 value number. This can
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/// cause merging of V1/V2 values numbers and compaction of the value space.
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void LiveInterval::MergeValueNumberInto(unsigned V1, unsigned V2) {
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assert(V1 != V2 && "Identical value#'s are always equivalent!");
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// This code actually merges the (numerically) larger value number into the
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// smaller value number, which is likely to allow us to compactify the value
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// space. The only thing we have to be careful of is to preserve the
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// instruction that defines the result value.
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// Make sure V2 is smaller than V1.
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if (V1 < V2) {
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setInstDefiningValNum(V1, getInstForValNum(V2));
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std::swap(V1, V2);
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}
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// Merge V1 live ranges into V2.
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for (iterator I = begin(); I != end(); ) {
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iterator LR = I++;
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if (LR->ValId != V1) continue; // Not a V1 LiveRange.
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// Okay, we found a V1 live range. If it had a previous, touching, V2 live
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// range, extend it.
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if (LR != begin()) {
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iterator Prev = LR-1;
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if (Prev->ValId == V2 && Prev->end == LR->start) {
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Prev->end = LR->end;
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// Erase this live-range.
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ranges.erase(LR);
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I = Prev+1;
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LR = Prev;
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}
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}
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// Okay, now we have a V1 or V2 live range that is maximally merged forward.
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// Ensure that it is a V2 live-range.
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LR->ValId = V2;
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// If we can merge it into later V2 live ranges, do so now. We ignore any
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// following V1 live ranges, as they will be merged in subsequent iterations
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// of the loop.
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if (I != end()) {
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if (I->start == LR->end && I->ValId == V2) {
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LR->end = I->end;
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ranges.erase(I);
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I = LR+1;
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}
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}
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}
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}
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std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) {
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return os << '[' << LR.start << ',' << LR.end << ':' << LR.ValId << ")";
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}
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@ -61,8 +61,7 @@ namespace {
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cl::init(true));
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}
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void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
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{
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void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<LiveVariables>();
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AU.addPreservedID(PHIEliminationID);
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AU.addRequiredID(PHIEliminationID);
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@ -71,8 +70,7 @@ void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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void LiveIntervals::releaseMemory()
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{
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void LiveIntervals::releaseMemory() {
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mi2iMap_.clear();
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i2miMap_.clear();
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r2iMap_.clear();
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@ -140,10 +138,10 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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for (MachineFunction::livein_iterator I = fn.livein_begin(),
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E = fn.livein_end(); I != E; ++I) {
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(I->first), 0, 0, true);
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getOrCreateInterval(I->first), true);
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for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(*AS), 0, 0, true);
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getOrCreateInterval(*AS), true);
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}
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}
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@ -179,13 +177,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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(RegRep = rep(srcReg)) == rep(dstReg)) {
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// remove from def list
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LiveInterval &interval = getOrCreateInterval(RegRep);
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// remove index -> MachineInstr and
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// MachineInstr -> index mappings
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Mi2IndexMap::iterator mi2i = mi2iMap_.find(mii);
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if (mi2i != mi2iMap_.end()) {
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i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
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mi2iMap_.erase(mi2i);
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}
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RemoveMachineInstrFromMaps(mii);
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mii = mbbi->erase(mii);
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++numPeep;
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}
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@ -252,8 +244,8 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
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assert(li.weight != HUGE_VAL &&
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"attempt to spill already spilled interval!");
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DEBUG(std::cerr << "\t\t\t\tadding intervals for spills for interval: "
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<< li << '\n');
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DEBUG(std::cerr << "\t\t\t\tadding intervals for spills for interval: ";
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li.print(std::cerr, mri_); std::cerr << '\n');
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg);
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@ -341,7 +333,8 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
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// a def, we can't do this.
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if (!mop.isUse()) NewRegLiveIn = 0;
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DEBUG(std::cerr << "\t\t\t\tadded new interval: " << nI << '\n');
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DEBUG(std::cerr << "\t\t\t\tadded new interval: ";
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nI.print(std::cerr, mri_); std::cerr << '\n');
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}
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}
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}
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@ -478,7 +471,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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if (lv_->RegisterDefIsDead(mi, interval.reg))
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interval.addRange(LiveRange(RedefIndex, RedefIndex+1, 0));
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DEBUG(std::cerr << "RESULT: " << interval);
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DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_));
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} else {
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// Otherwise, this must be because of phi elimination. If this is the
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@ -492,17 +485,17 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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MachineInstr *Killer = vi.Kills[0];
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unsigned Start = getInstructionIndex(Killer->getParent()->begin());
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unsigned End = getUseIndex(getInstructionIndex(Killer))+1;
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DEBUG(std::cerr << "Removing [" << Start << "," << End << "] from: "
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<< interval << "\n");
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DEBUG(std::cerr << "Removing [" << Start << "," << End << "] from: ";
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interval.print(std::cerr, mri_); std::cerr << "\n");
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interval.removeRange(Start, End);
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DEBUG(std::cerr << "RESULT: " << interval);
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DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_));
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// Replace the interval with one of a NEW value number. Note that this
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// value number isn't actually defined by an instruction, weird huh? :)
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LiveRange LR(Start, End, interval.getNextValue(~0U));
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DEBUG(std::cerr << " replace range with " << LR);
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interval.addRange(LR);
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DEBUG(std::cerr << "RESULT: " << interval);
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DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_));
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}
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// In the case of PHI elimination, each variable definition is only
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@ -523,7 +516,6 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval,
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unsigned SrcReg, unsigned DestReg,
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bool isLiveIn) {
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// A physical register cannot be live across basic block, so its
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// lifetime must end somewhere in its defining basic block.
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@ -564,44 +556,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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exit:
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assert(start < end && "did not find end of interval?");
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// Finally, if this is defining a new range for the physical register, and if
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// that physreg is just a copy from a vreg, and if THAT vreg was a copy from
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// the physreg, then the new fragment has the same value as the one copied
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// into the vreg.
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if (interval.reg == DestReg && !interval.empty() &&
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MRegisterInfo::isVirtualRegister(SrcReg)) {
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// Get the live interval for the vreg, see if it is defined by a copy.
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LiveInterval &SrcInterval = getOrCreateInterval(SrcReg);
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if (SrcInterval.containsOneValue()) {
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assert(!SrcInterval.empty() && "Can't contain a value and be empty!");
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// Get the first index of the first range. Though the interval may have
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// multiple liveranges in it, we only check the first.
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unsigned StartIdx = SrcInterval.begin()->start;
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MachineInstr *SrcDefMI = getInstructionFromIndex(StartIdx);
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// Check to see if the vreg was defined by a copy instruction, and that
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// the source was this physreg.
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unsigned VRegSrcSrc, VRegSrcDest;
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if (tii_->isMoveInstr(*SrcDefMI, VRegSrcSrc, VRegSrcDest) &&
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SrcReg == VRegSrcDest && VRegSrcSrc == DestReg) {
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// Okay, now we know that the vreg was defined by a copy from this
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// physreg. Find the value number being copied and use it as the value
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// for this range.
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const LiveRange *DefRange = interval.getLiveRangeContaining(StartIdx-1);
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if (DefRange) {
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LiveRange LR(start, end, DefRange->ValId);
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interval.addRange(LR);
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DEBUG(std::cerr << " +" << LR << '\n');
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return;
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}
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}
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}
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}
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LiveRange LR(start, end, interval.getNextValue(start));
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LiveRange LR(start, end, interval.getNextValue(isLiveIn ? ~0U : start));
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interval.addRange(LR);
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DEBUG(std::cerr << " +" << LR << '\n');
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}
|
||||
@ -612,15 +567,9 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
|
||||
if (MRegisterInfo::isVirtualRegister(reg))
|
||||
handleVirtualRegisterDef(MBB, MI, getOrCreateInterval(reg));
|
||||
else if (allocatableRegs_[reg]) {
|
||||
unsigned SrcReg = 0, DestReg = 0;
|
||||
if (!tii_->isMoveInstr(*MI, SrcReg, DestReg))
|
||||
SrcReg = DestReg = 0;
|
||||
|
||||
handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(reg),
|
||||
SrcReg, DestReg);
|
||||
handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(reg));
|
||||
for (const unsigned* AS = mri_->getAliasSet(reg); *AS; ++AS)
|
||||
handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(*AS),
|
||||
SrcReg, DestReg);
|
||||
handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(*AS));
|
||||
}
|
||||
}
|
||||
|
||||
@ -628,8 +577,7 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
|
||||
/// registers. for some ordering of the machine instructions [1,N] a
|
||||
/// live interval is an interval [i, j) where 1 <= i <= j < N for
|
||||
/// which a variable is live
|
||||
void LiveIntervals::computeIntervals()
|
||||
{
|
||||
void LiveIntervals::computeIntervals() {
|
||||
DEBUG(std::cerr << "********** COMPUTING LIVE INTERVALS **********\n");
|
||||
DEBUG(std::cerr << "********** Function: "
|
||||
<< ((Value*)mf_->getFunction())->getName() << '\n');
|
||||
@ -664,131 +612,200 @@ void LiveIntervals::computeIntervals()
|
||||
}
|
||||
}
|
||||
|
||||
/// IntA is defined as a copy from IntB and we know it only has one value
|
||||
/// number. If all of the places that IntA and IntB overlap are defined by
|
||||
/// copies from IntA to IntB, we know that these two ranges can really be
|
||||
/// merged if we adjust the value numbers. If it is safe, adjust the value
|
||||
/// numbers and return true, allowing coalescing to occur.
|
||||
bool LiveIntervals::
|
||||
AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
|
||||
LiveInterval &IntB,
|
||||
unsigned CopyIdx) {
|
||||
std::vector<LiveRange*> Ranges;
|
||||
IntA.getOverlapingRanges(IntB, CopyIdx, Ranges);
|
||||
/// AdjustCopiesBackFrom - We found a non-trivially-coallescable copy with IntA
|
||||
/// being the source and IntB being the dest, thus this defines a value number
|
||||
/// in IntB. If the source value number (in IntA) is defined by a copy from B,
|
||||
/// see if we can merge these two pieces of B into a single value number,
|
||||
/// eliminating a copy. For example:
|
||||
///
|
||||
/// A3 = B0
|
||||
/// ...
|
||||
/// B1 = A3 <- this copy
|
||||
///
|
||||
/// In this case, B0 can be extended to where the B1 copy lives, allowing the B1
|
||||
/// value number to be replaced with B0 (which simplifies the B liveinterval).
|
||||
///
|
||||
/// This returns true if an interval was modified.
|
||||
///
|
||||
bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
|
||||
MachineInstr *CopyMI,
|
||||
unsigned CopyIdx) {
|
||||
// BValNo is a value number in B that is defined by a copy from A. 'B3' in
|
||||
// the example above.
|
||||
LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx);
|
||||
unsigned BValNo = BLR->ValId;
|
||||
|
||||
assert(!Ranges.empty() && "Why didn't we do a simple join of this?");
|
||||
// Get the location that B is defined at. Two options: either this value has
|
||||
// an unknown definition point or it is defined at CopyIdx. If unknown, we
|
||||
// can't process it.
|
||||
unsigned BValNoDefIdx = IntB.getInstForValNum(BValNo);
|
||||
if (BValNoDefIdx == ~0U) return false;
|
||||
assert(BValNoDefIdx == CopyIdx &&
|
||||
"Copy doesn't define the value?");
|
||||
|
||||
unsigned IntBRep = rep(IntB.reg);
|
||||
// AValNo is the value number in A that defines the copy, A0 in the example.
|
||||
LiveInterval::iterator AValLR = IntA.FindLiveRangeContaining(CopyIdx-1);
|
||||
unsigned AValNo = AValLR->ValId;
|
||||
|
||||
// Check to see if all of the overlaps (entries in Ranges) are defined by a
|
||||
// copy from IntA. If not, exit.
|
||||
for (unsigned i = 0, e = Ranges.size(); i != e; ++i) {
|
||||
unsigned Idx = Ranges[i]->start;
|
||||
MachineInstr *MI = getInstructionFromIndex(Idx);
|
||||
unsigned SrcReg, DestReg;
|
||||
if (!tii_->isMoveInstr(*MI, SrcReg, DestReg)) return false;
|
||||
// If AValNo is defined as a copy from IntB, we can potentially process this.
|
||||
|
||||
// Get the instruction that defines this value number.
|
||||
unsigned AValNoInstIdx = IntA.getInstForValNum(AValNo);
|
||||
|
||||
// If it's unknown, ignore it.
|
||||
if (AValNoInstIdx == ~0U || AValNoInstIdx == ~1U) return false;
|
||||
// Otherwise, get the instruction for it.
|
||||
MachineInstr *AValNoInstMI = getInstructionFromIndex(AValNoInstIdx);
|
||||
|
||||
// If this copy isn't actually defining this range, it must be a live
|
||||
// range spanning basic blocks or something.
|
||||
if (rep(DestReg) != rep(IntA.reg)) return false;
|
||||
// If the value number is not defined by a copy instruction, ignore it.
|
||||
unsigned SrcReg, DstReg;
|
||||
if (!tii_->isMoveInstr(*AValNoInstMI, SrcReg, DstReg))
|
||||
return false;
|
||||
|
||||
// Check to see if this is coming from IntB. If not, bail out.
|
||||
if (rep(SrcReg) != IntBRep) return false;
|
||||
}
|
||||
// If the source register comes from an interval other than IntB, we can't
|
||||
// handle this.
|
||||
assert(rep(DstReg) == IntA.reg && "Not defining a reg in IntA?");
|
||||
if (rep(SrcReg) != IntB.reg) return false;
|
||||
|
||||
// Get the LiveRange in IntB that this value number starts with.
|
||||
LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNoInstIdx-1);
|
||||
|
||||
// Make sure that the end of the live range is inside the same block as
|
||||
// CopyMI.
|
||||
MachineInstr *ValLREndInst = getInstructionFromIndex(ValLR->end-1);
|
||||
if (ValLREndInst->getParent() != CopyMI->getParent()) return false;
|
||||
|
||||
// Okay, we can change this one. Get the IntB value number that IntA is
|
||||
// copied from.
|
||||
unsigned ActualValNo = IntA.getLiveRangeContaining(CopyIdx-1)->ValId;
|
||||
// Okay, we now know that ValLR ends in the same block that the CopyMI
|
||||
// live-range starts. If there are no intervening live ranges between them in
|
||||
// IntB, we can merge them.
|
||||
if (ValLR+1 != BLR) return false;
|
||||
|
||||
// Change all of the value numbers to the same as what we IntA is copied from.
|
||||
for (unsigned i = 0, e = Ranges.size(); i != e; ++i)
|
||||
Ranges[i]->ValId = ActualValNo;
|
||||
DEBUG(std::cerr << "\nExtending: "; IntB.print(std::cerr, mri_));
|
||||
|
||||
// Okay, we can merge them. We need to insert a new liverange:
|
||||
// [ValLR.end, BLR.begin) of either value number, then we merge the
|
||||
// two value numbers.
|
||||
IntB.addRange(LiveRange(ValLR->end, BLR->start, BValNo));
|
||||
|
||||
// Okay, merge "B1" into the same value number as "B0".
|
||||
if (BValNo != ValLR->ValId)
|
||||
IntB.MergeValueNumberInto(BValNo, ValLR->ValId);
|
||||
DEBUG(std::cerr << " result = "; IntB.print(std::cerr, mri_);
|
||||
std::cerr << "\n");
|
||||
|
||||
// Finally, delete the copy instruction.
|
||||
RemoveMachineInstrFromMaps(CopyMI);
|
||||
CopyMI->eraseFromParent();
|
||||
++numPeep;
|
||||
return true;
|
||||
}
|
||||
|
||||
void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) {
|
||||
DEBUG(std::cerr << ((Value*)MBB->getBasicBlock())->getName() << ":\n");
|
||||
|
||||
for (MachineBasicBlock::iterator mi = MBB->begin(), mie = MBB->end();
|
||||
mi != mie; ++mi) {
|
||||
DEBUG(std::cerr << getInstructionIndex(mi) << '\t' << *mi);
|
||||
|
||||
// we only join virtual registers with allocatable
|
||||
// physical registers since we do not have liveness information
|
||||
// on not allocatable physical registers
|
||||
unsigned SrcReg, DestReg;
|
||||
if (tii_->isMoveInstr(*mi, SrcReg, DestReg) &&
|
||||
(MRegisterInfo::isVirtualRegister(SrcReg) || allocatableRegs_[SrcReg])&&
|
||||
(MRegisterInfo::isVirtualRegister(DestReg)||allocatableRegs_[DestReg])){
|
||||
|
||||
// Get representative registers.
|
||||
SrcReg = rep(SrcReg);
|
||||
DestReg = rep(DestReg);
|
||||
|
||||
// If they are already joined we continue.
|
||||
if (SrcReg == DestReg)
|
||||
continue;
|
||||
|
||||
// If they are both physical registers, we cannot join them.
|
||||
if (MRegisterInfo::isPhysicalRegister(SrcReg) &&
|
||||
MRegisterInfo::isPhysicalRegister(DestReg))
|
||||
continue;
|
||||
|
||||
// If they are not of the same register class, we cannot join them.
|
||||
if (differingRegisterClasses(SrcReg, DestReg))
|
||||
continue;
|
||||
|
||||
LiveInterval &SrcInt = getInterval(SrcReg);
|
||||
LiveInterval &DestInt = getInterval(DestReg);
|
||||
assert(SrcInt.reg == SrcReg && DestInt.reg == DestReg &&
|
||||
"Register mapping is horribly broken!");
|
||||
|
||||
DEBUG(std::cerr << "\t\tInspecting "; SrcInt.print(std::cerr, mri_);
|
||||
std::cerr << " and "; DestInt.print(std::cerr, mri_);
|
||||
std::cerr << ": ");
|
||||
|
||||
// If two intervals contain a single value and are joined by a copy, it
|
||||
// does not matter if the intervals overlap, they can always be joined.
|
||||
bool Joinable = SrcInt.containsOneValue() && DestInt.containsOneValue();
|
||||
|
||||
unsigned MIDefIdx = getDefIndex(getInstructionIndex(mi));
|
||||
|
||||
// If the intervals think that this is joinable, do so now.
|
||||
if (!Joinable && DestInt.joinable(SrcInt, MIDefIdx))
|
||||
Joinable = true;
|
||||
|
||||
// If DestInt is actually a copy from SrcInt (which we know) that is used
|
||||
// to define another value of SrcInt, we can change the other range of
|
||||
// SrcInt to be the value of the range that defines DestInt, allowing a
|
||||
// coalesce.
|
||||
if (!Joinable && DestInt.containsOneValue() &&
|
||||
AdjustIfAllOverlappingRangesAreCopiesFrom(SrcInt, DestInt, MIDefIdx))
|
||||
Joinable = true;
|
||||
|
||||
if (!Joinable || overlapsAliases(&SrcInt, &DestInt)) {
|
||||
DEBUG(std::cerr << "Interference!\n");
|
||||
} else {
|
||||
DestInt.join(SrcInt, MIDefIdx);
|
||||
DEBUG(std::cerr << "Joined. Result = " << DestInt << "\n");
|
||||
|
||||
if (!MRegisterInfo::isPhysicalRegister(SrcReg)) {
|
||||
r2iMap_.erase(SrcReg);
|
||||
r2rMap_[SrcReg] = DestReg;
|
||||
} else {
|
||||
// Otherwise merge the data structures the other way so we don't lose
|
||||
// the physreg information.
|
||||
r2rMap_[DestReg] = SrcReg;
|
||||
DestInt.reg = SrcReg;
|
||||
SrcInt.swap(DestInt);
|
||||
r2iMap_.erase(DestReg);
|
||||
}
|
||||
++numJoins;
|
||||
}
|
||||
}
|
||||
/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
|
||||
/// which are the src/dst of the copy instruction CopyMI. This returns true
|
||||
/// if the copy was successfully coallesced away, or if it is never possible
|
||||
/// to coallesce these this copy, due to register constraints. It returns
|
||||
/// false if it is not currently possible to coallesce this interval, but
|
||||
/// it may be possible if other things get coallesced.
|
||||
bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
|
||||
unsigned SrcReg, unsigned DstReg) {
|
||||
|
||||
|
||||
DEBUG(std::cerr << getInstructionIndex(CopyMI) << '\t' << *CopyMI);
|
||||
|
||||
// Get representative registers.
|
||||
SrcReg = rep(SrcReg);
|
||||
DstReg = rep(DstReg);
|
||||
|
||||
// If they are already joined we continue.
|
||||
if (SrcReg == DstReg) {
|
||||
DEBUG(std::cerr << "\tCopy already coallesced.\n");
|
||||
return true; // Not coallescable.
|
||||
}
|
||||
|
||||
// If they are both physical registers, we cannot join them.
|
||||
if (MRegisterInfo::isPhysicalRegister(SrcReg) &&
|
||||
MRegisterInfo::isPhysicalRegister(DstReg)) {
|
||||
DEBUG(std::cerr << "\tCan not coallesce physregs.\n");
|
||||
return true; // Not coallescable.
|
||||
}
|
||||
|
||||
// We only join virtual registers with allocatable physical registers.
|
||||
if (MRegisterInfo::isPhysicalRegister(SrcReg) && !allocatableRegs_[SrcReg]){
|
||||
DEBUG(std::cerr << "\tSrc reg is unallocatable physreg.\n");
|
||||
return true; // Not coallescable.
|
||||
}
|
||||
if (MRegisterInfo::isPhysicalRegister(DstReg) && !allocatableRegs_[DstReg]){
|
||||
DEBUG(std::cerr << "\tDst reg is unallocatable physreg.\n");
|
||||
return true; // Not coallescable.
|
||||
}
|
||||
|
||||
// If they are not of the same register class, we cannot join them.
|
||||
if (differingRegisterClasses(SrcReg, DstReg)) {
|
||||
DEBUG(std::cerr << "\tSrc/Dest are different register classes.\n");
|
||||
return true; // Not coallescable.
|
||||
}
|
||||
|
||||
LiveInterval &SrcInt = getInterval(SrcReg);
|
||||
LiveInterval &DestInt = getInterval(DstReg);
|
||||
assert(SrcInt.reg == SrcReg && DestInt.reg == DstReg &&
|
||||
"Register mapping is horribly broken!");
|
||||
|
||||
DEBUG(std::cerr << "\t\tInspecting "; SrcInt.print(std::cerr, mri_);
|
||||
std::cerr << " and "; DestInt.print(std::cerr, mri_);
|
||||
std::cerr << ": ");
|
||||
|
||||
// If two intervals contain a single value and are joined by a copy, it
|
||||
// does not matter if the intervals overlap, they can always be joined.
|
||||
|
||||
bool Joinable = SrcInt.containsOneValue() && DestInt.containsOneValue();
|
||||
|
||||
unsigned MIDefIdx = getDefIndex(getInstructionIndex(CopyMI));
|
||||
|
||||
// If the intervals think that this is joinable, do so now.
|
||||
if (!Joinable && DestInt.joinable(SrcInt, MIDefIdx))
|
||||
Joinable = true;
|
||||
|
||||
// If DestInt is actually a copy from SrcInt (which we know) that is used
|
||||
// to define another value of SrcInt, we can change the other range of
|
||||
// SrcInt to be the value of the range that defines DestInt, simplying the
|
||||
// interval an promoting coallescing.
|
||||
if (!Joinable && AdjustCopiesBackFrom(SrcInt, DestInt, CopyMI, MIDefIdx))
|
||||
return true;
|
||||
|
||||
// If this looks joinable, do the final, expensive last check, checking to see
|
||||
// if aliases overlap. If they do, we can never join these.
|
||||
if (Joinable && overlapsAliases(&SrcInt, &DestInt)) {
|
||||
DEBUG(std::cerr << "Alias Overlap Interference!\n");
|
||||
return true; // Can never join these.
|
||||
}
|
||||
|
||||
if (!Joinable) {
|
||||
DEBUG(std::cerr << "Interference!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
DestInt.join(SrcInt, MIDefIdx);
|
||||
DEBUG(std::cerr << "\n\t\tJoined. Result = "; DestInt.print(std::cerr, mri_);
|
||||
std::cerr << "\n");
|
||||
|
||||
if (!MRegisterInfo::isPhysicalRegister(SrcReg)) {
|
||||
r2iMap_.erase(SrcReg);
|
||||
r2rMap_[SrcReg] = DstReg;
|
||||
} else {
|
||||
// Otherwise merge the data structures the other way so we don't lose
|
||||
// the physreg information.
|
||||
r2rMap_[DstReg] = SrcReg;
|
||||
DestInt.reg = SrcReg;
|
||||
SrcInt.swap(DestInt);
|
||||
r2iMap_.erase(DstReg);
|
||||
}
|
||||
++numJoins;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
|
||||
namespace {
|
||||
// DepthMBBCompare - Comparison predicate that sort first based on the loop
|
||||
// depth of the basic block (the unsigned), and then on the MBB number.
|
||||
@ -802,15 +819,36 @@ namespace {
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
void LiveIntervals::CopyCoallesceInMBB(MachineBasicBlock *MBB,
|
||||
std::vector<CopyRec> &TryAgain) {
|
||||
DEBUG(std::cerr << ((Value*)MBB->getBasicBlock())->getName() << ":\n");
|
||||
|
||||
for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end();
|
||||
MII != E;) {
|
||||
MachineInstr *Inst = MII++;
|
||||
|
||||
// If this isn't a copy, we can't join intervals.
|
||||
unsigned SrcReg, DstReg;
|
||||
if (!tii_->isMoveInstr(*Inst, SrcReg, DstReg)) continue;
|
||||
|
||||
if (!JoinCopy(Inst, SrcReg, DstReg))
|
||||
TryAgain.push_back(getCopyRec(Inst, SrcReg, DstReg));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void LiveIntervals::joinIntervals() {
|
||||
DEBUG(std::cerr << "********** JOINING INTERVALS ***********\n");
|
||||
|
||||
std::vector<CopyRec> TryAgainList;
|
||||
|
||||
const LoopInfo &LI = getAnalysis<LoopInfo>();
|
||||
if (LI.begin() == LI.end()) {
|
||||
// If there are no loops in the function, join intervals in function order.
|
||||
for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();
|
||||
I != E; ++I)
|
||||
joinIntervalsInMachineBB(I);
|
||||
CopyCoallesceInMBB(I, TryAgainList);
|
||||
} else {
|
||||
// Otherwise, join intervals in inner loops before other intervals.
|
||||
// Unfortunately we can't just iterate over loop hierarchy here because
|
||||
@ -825,9 +863,25 @@ void LiveIntervals::joinIntervals() {
|
||||
|
||||
// Finally, join intervals in loop nest order.
|
||||
for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
|
||||
joinIntervalsInMachineBB(MBBs[i].second);
|
||||
CopyCoallesceInMBB(MBBs[i].second, TryAgainList);
|
||||
}
|
||||
|
||||
// Joining intervals can allow other intervals to be joined. Iteratively join
|
||||
// until we make no progress.
|
||||
bool ProgressMade = true;
|
||||
while (ProgressMade) {
|
||||
ProgressMade = false;
|
||||
|
||||
for (unsigned i = 0, e = TryAgainList.size(); i != e; ++i) {
|
||||
CopyRec &TheCopy = TryAgainList[i];
|
||||
if (TheCopy.MI &&
|
||||
JoinCopy(TheCopy.MI, TheCopy.SrcReg, TheCopy.DstReg)) {
|
||||
TheCopy.MI = 0; // Mark this one as done.
|
||||
ProgressMade = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
DEBUG(std::cerr << "*** Register mapping ***\n");
|
||||
DEBUG(for (int i = 0, e = r2rMap_.size(); i != e; ++i)
|
||||
if (r2rMap_[i]) {
|
||||
|
||||
@ -521,7 +521,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
|
||||
// Process all of the spilled uses and all non spilled reg references.
|
||||
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
|
||||
MachineOperand &MO = MI.getOperand(i);
|
||||
|
||||
if (!MO.isRegister() || MO.getReg() == 0)
|
||||
continue; // Ignore non-register operands.
|
||||
|
||||
@ -791,37 +790,16 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
|
||||
}
|
||||
|
||||
if (!OpTakenCareOf) {
|
||||
// Check to see if this is a noop copy. If so, eliminate the
|
||||
// instruction before considering the dest reg to be changed.
|
||||
unsigned Src, Dst;
|
||||
if (TII->isMoveInstr(MI, Src, Dst)) {
|
||||
if (Src == Dst) {
|
||||
// Check to see if this is a noop copy. If so, eliminate
|
||||
// the instruction before considering the dest reg to be
|
||||
// changed.
|
||||
++NumDCE;
|
||||
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
|
||||
MBB.erase(&MI);
|
||||
VRM.RemoveFromFoldedVirtMap(&MI);
|
||||
goto ProcessNextInst;
|
||||
} else if (MII != MBB.begin()) {
|
||||
// Check to see if this is a sequence of the form:
|
||||
// mov R0, R1
|
||||
// mov R1, R0
|
||||
// Eliminate the second move if so.
|
||||
MachineBasicBlock::iterator PrevMII = MII; --PrevMII;
|
||||
MachineInstr& PrevMI = *PrevMII;
|
||||
unsigned PrevSrc, PrevDst;
|
||||
|
||||
if (TII->isMoveInstr(PrevMI, PrevSrc, PrevDst))
|
||||
if (PrevSrc == Dst && PrevDst == Src) {
|
||||
++NumDCE;
|
||||
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
|
||||
MBB.erase(&MI);
|
||||
VRM.RemoveFromFoldedVirtMap(&MI);
|
||||
goto ProcessNextInst;
|
||||
}
|
||||
}
|
||||
if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
|
||||
++NumDCE;
|
||||
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
|
||||
MBB.erase(&MI);
|
||||
VRM.RemoveFromFoldedVirtMap(&MI);
|
||||
goto ProcessNextInst;
|
||||
}
|
||||
|
||||
Spills.ClobberPhysReg(VirtReg);
|
||||
continue;
|
||||
}
|
||||
@ -883,6 +861,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
llvm::Spiller* llvm::createSpiller() {
|
||||
switch (SpillerOpt) {
|
||||
default: assert(0 && "Unreachable!");
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user