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Add AssertSext, AssertZext nodes for targets that pass arguments in

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registers, and the incoming values have already been zero or sign extended
from the appopriate type to the register width.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23146 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman 2005-08-30 02:39:32 +00:00
parent f155635b53
commit f7f3d32191
1 changed files with 7 additions and 0 deletions
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7
include/llvm/CodeGen/SelectionDAGNodes.h
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@ -52,6 +52,13 @@ namespace ISD {
// single token result. This is used to represent the fact that the operand
// operators are independent of each other.
TokenFactor,
// AssertSext, AssertZext - These nodes record if a register contains a
// value that has already been zero or sign extended from a narrower type.
// These nodes take two operands. The first is the node that has already
// been extended, and the second is a value type node indicating the width
// of the extension
AssertSext, AssertZext,
// Various leaf nodes.
Constant, ConstantFP, GlobalAddress, FrameIndex, ConstantPool,