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Use newly added next() and prior() utility functions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos 2004-02-14 01:18:34 +00:00
parent bc79471be1
commit f81af21caf
9 changed files with 26 additions and 27 deletions
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7
lib/CodeGen/PHIElimination.cpp
View File

@ -20,6 +20,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CFG.h"
#include "Support/STLExtras.h"
namespace llvm {
@ -171,8 +172,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
bool HaveNotEmitted = true;
if (I != opBlock.begin()) {
MachineBasicBlock::iterator PrevInst = I;
--PrevInst;
MachineBasicBlock::iterator PrevInst = prior(I);
for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) {
MachineOperand &MO = PrevInst->getOperand(i);
if (MO.isRegister() && MO.getReg() == IncomingReg)
@ -253,8 +253,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
// kills the incoming value!
//
if (!ValueIsLive) {
MachineBasicBlock::iterator Prev = I;
--Prev;
MachineBasicBlock::iterator Prev = prior(I);
LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
}
}

4
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -38,6 +38,7 @@
#include "llvm/Target/TargetMachine.h"
#include "Support/Debug.h"
#include "Support/Statistic.h"
#include "Support/STLExtras.h"
#include <iostream>
using namespace llvm;
@ -134,8 +135,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
numInstrsAdded += Added;
MachineBasicBlock::iterator prevMi = mi;
--prevMi;
MachineBasicBlock::iterator prevMi = prior(mi);
DEBUG(std::cerr << "\t\tadded instruction: ";
prevMi->print(std::cerr, TM));

8
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
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@ -514,7 +514,7 @@ void PhyRegAlloc::updateMachineCode()
for (MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII)
if (unsigned delaySlots =
TM.getInstrInfo().getNumDelaySlots(MII->getOpcode())) {
MachineBasicBlock::iterator DelaySlotMI = MII; ++DelaySlotMI;
MachineBasicBlock::iterator DelaySlotMI = next(MII);
assert(DelaySlotMI != MBB.end() && "no instruction for delay slot");
// Check the 2 conditions above:
@ -552,8 +552,7 @@ void PhyRegAlloc::updateMachineCode()
else {
// For non-branch instr with delay slots (probably a call), move
// InstrAfter to the instr. in the last delay slot.
MachineBasicBlock::iterator tmp = MII;
std::advance(tmp, delaySlots);
MachineBasicBlock::iterator tmp = next(MII, delaySlots);
move2DelayedInstr(MII, tmp);
}
}
@ -646,8 +645,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
// include all live variables before that branch or return -- we don't want to
// trample those! Verify that the set is included in the LV set before MInst.
if (MII != MBB.begin()) {
MachineBasicBlock::iterator PredMI = MII;
--PredMI;
MachineBasicBlock::iterator PredMI = prior(MII);
if (unsigned DS = TM.getInstrInfo().getNumDelaySlots(PredMI->getOpcode()))
assert(set_difference(LVI->getLiveVarSetBeforeMInst(PredMI), LVSetBef)
.empty() && "Live-var set before branch should be included in "

3
lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
View File

@ -19,6 +19,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "Support/STLExtras.h"
namespace llvm {
@ -31,7 +32,7 @@ DeleteInstruction(MachineBasicBlock& mvec,
// Check if this instruction is in a delay slot of its predecessor.
if (BBI != mvec.begin()) {
const TargetInstrInfo& mii = target.getInstrInfo();
MachineBasicBlock::iterator predMI = BBI; --predMI;
MachineBasicBlock::iterator predMI = prior(BBI);
if (unsigned ndelay = mii.getNumDelaySlots(predMI->getOpcode())) {
// This instruction is in a delay slot of its predecessor, so
// replace it with a nop. By replacing in place, we save having

8
lib/Target/X86/FloatingPoint.cpp
View File

@ -42,6 +42,7 @@
#include "Support/Debug.h"
#include "Support/DepthFirstIterator.h"
#include "Support/Statistic.h"
#include "Support/STLExtras.h"
#include <algorithm>
#include <set>
using namespace llvm;
@ -199,11 +200,8 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
continue; // Efficiently ignore non-fp insts!
MachineInstr *PrevMI = 0;
if (I != BB.begin()) {
MachineBasicBlock::iterator tmp = I;
--tmp;
PrevMI = tmp;
}
if (I != BB.begin())
PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t";

6
lib/Target/X86/PeepholeOptimizer.cpp
View File

@ -16,6 +16,8 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/MRegisterInfo.h"
#include "Support/Statistic.h"
#include "Support/STLExtras.h"
using namespace llvm;
namespace {
@ -51,7 +53,7 @@ bool PH::runOnMachineFunction(MachineFunction &MF) {
bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
assert(I != MBB.end());
MachineBasicBlock::iterator NextI = I; ++NextI;
MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
@ -376,7 +378,7 @@ bool SSAPH::OptimizeAddress(MachineInstr *MI, unsigned OpNo) {
bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
MachineBasicBlock::iterator NextI = I; ++NextI;
MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;

8
lib/Target/X86/X86FloatingPoint.cpp
View File

@ -42,6 +42,7 @@
#include "Support/Debug.h"
#include "Support/DepthFirstIterator.h"
#include "Support/Statistic.h"
#include "Support/STLExtras.h"
#include <algorithm>
#include <set>
using namespace llvm;
@ -199,11 +200,8 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
continue; // Efficiently ignore non-fp insts!
MachineInstr *PrevMI = 0;
if (I != BB.begin()) {
MachineBasicBlock::iterator tmp = I;
--tmp;
PrevMI = tmp;
}
if (I != BB.begin())
PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t";

6
lib/Target/X86/X86PeepholeOpt.cpp
View File

@ -16,6 +16,8 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/MRegisterInfo.h"
#include "Support/Statistic.h"
#include "Support/STLExtras.h"
using namespace llvm;
namespace {
@ -51,7 +53,7 @@ bool PH::runOnMachineFunction(MachineFunction &MF) {
bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
assert(I != MBB.end());
MachineBasicBlock::iterator NextI = I; ++NextI;
MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
@ -376,7 +378,7 @@ bool SSAPH::OptimizeAddress(MachineInstr *MI, unsigned OpNo) {
bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
MachineBasicBlock::iterator NextI = I; ++NextI;
MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;

3
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "Support/CommandLine.h"
#include "Support/STLExtras.h"
namespace llvm {
@ -223,7 +224,7 @@ int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
unsigned oldSize = MBB.size();
const MachineFrameInfo *MFI = MF.getFrameInfo();
MachineBasicBlock::iterator MBBI = MBB.end(); --MBBI;
MachineBasicBlock::iterator MBBI = prior(MBB.end());
MachineInstr *MI;
assert(MBBI->getOpcode() == X86::RET &&
"Can only insert epilog into returning blocks");