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Reduce duplicate code in isHorizontalBinOp and add some asserts to protect assumptions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145681 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-12-02 08:18:41 +00:00
parent 138a5c66b9
commit f8363305eb
1 changed files with 24 additions and 32 deletions
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56
lib/Target/X86/X86ISelLowering.cpp
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@ -14329,9 +14329,18 @@ static bool isHorizontalBinOp(SDValue &LHS, SDValue &RHS, bool isCommutative) {
return false; return false;
EVT VT = LHS.getValueType(); EVT VT = LHS.getValueType();
assert((VT.is128BitVector() || VT.is256BitVector()) &&
"Unsupported vector type for horizontal add/sub");
// Handle 128 and 256-bit vector lengths. AVX defines horizontal add/sub to
// operate independently on 128-bit lanes.
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned NumLanes = VT.getSizeInBits()/128; unsigned NumLanes = VT.getSizeInBits()/128;
unsigned NumLaneElts = NumElts / NumLanes; unsigned NumLaneElts = NumElts / NumLanes;
assert((NumLaneElts % 2 == 0) &&
"Vector type should have an even number of elements in each lane");
unsigned HalfLaneElts = NumLaneElts/2;
// View LHS in the form // View LHS in the form
// LHS = VECTOR_SHUFFLE A, B, LMask // LHS = VECTOR_SHUFFLE A, B, LMask
@ -14394,40 +14403,23 @@ static bool isHorizontalBinOp(SDValue &LHS, SDValue &RHS, bool isCommutative) {
// LHS = VECTOR_SHUFFLE A, B, LMask // LHS = VECTOR_SHUFFLE A, B, LMask
// RHS = VECTOR_SHUFFLE A, B, RMask // RHS = VECTOR_SHUFFLE A, B, RMask
// Check that the masks correspond to performing a horizontal operation. // Check that the masks correspond to performing a horizontal operation.
for (unsigned l = 0; l != NumLanes; ++l) { for (unsigned i = 0; i != NumElts; ++i) {
unsigned LaneStart = l*NumLaneElts; unsigned LIdx = LMask[i], RIdx = RMask[i];
for (unsigned i = 0; i != NumLaneElts/2; ++i) {
unsigned LIdx = LMask[i+LaneStart];
unsigned RIdx = RMask[i+LaneStart];
// Ignore any UNDEF components. // Ignore any UNDEF components.
if (LIdx >= 2*NumElts || RIdx >= 2*NumElts || if (LIdx >= 2*NumElts || RIdx >= 2*NumElts ||
(!A.getNode() && (LIdx < NumElts || RIdx < NumElts)) || (!A.getNode() && (LIdx < NumElts || RIdx < NumElts)) ||
(!B.getNode() && (LIdx >= NumElts || RIdx >= NumElts))) (!B.getNode() && (LIdx >= NumElts || RIdx >= NumElts)))
continue; continue;
// Check that successive elements are being operated on. If not, this is // Check that successive elements are being operated on. If not, this is
// not a horizontal operation. // not a horizontal operation.
if (!(LIdx == 2*i + LaneStart && RIdx == 2*i + LaneStart + 1) && unsigned Src = (i/HalfLaneElts) % 2; // each lane is split between srcs
!(isCommutative && LIdx == 2*i + LaneStart + 1 && RIdx == 2*i + LaneStart)) unsigned LaneStart = (i/NumLaneElts) * NumLaneElts;
return false; unsigned Index = 2*(i%HalfLaneElts) + NumElts*Src + LaneStart;
} if (!(LIdx == Index && RIdx == Index + 1) &&
for (unsigned i = 0; i != NumLaneElts/2; ++i) { !(isCommutative && LIdx == Index + 1 && RIdx == Index))
unsigned LIdx = LMask[i+(NumLaneElts/2)+LaneStart]; return false;
unsigned RIdx = RMask[i+(NumLaneElts/2)+LaneStart];
// Ignore any UNDEF components.
if (LIdx >= 2*NumElts || RIdx >= 2*NumElts ||
(!A.getNode() && (LIdx < NumElts || RIdx < NumElts)) ||
(!B.getNode() && (LIdx >= NumElts || RIdx >= NumElts)))
continue;
// Check that successive elements are being operated on. If not, this is
// not a horizontal operation.
if (!(LIdx == 2*i + LaneStart + NumElts && RIdx == 2*i + LaneStart + NumElts + 1) &&
!(isCommutative && LIdx == 2*i + LaneStart + NumElts + 1 && RIdx == 2*i + LaneStart + NumElts))
return false;
}
} }
LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it. LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it.