ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.

This makes it more likely that we can use the 16-bit push and pop instructions
on Thumb-2, saving around 4 bytes per function.

Differential Revision: http://reviews.llvm.org/D9165

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235637 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Peter Collingbourne
2015-04-23 20:31:26 +00:00
parent b28abbf98b
commit f86c29ea2c
11 changed files with 42 additions and 42 deletions

View File

@@ -12,11 +12,11 @@ declare void @bar(i8*)
define void @check_simple() minsize {
; CHECK-LABEL: check_simple:
; CHECK: push.w {r7, r8, r9, r10, r11, lr}
; CHECK: push {r3, r4, r5, r6, r7, lr}
; CHECK-NOT: sub sp, sp,
; ...
; CHECK-NOT: add sp, sp,
; CHECK: pop.w {r0, r1, r2, r3, r11, pc}
; CHECK: pop {r0, r1, r2, r3, r7, pc}
; CHECK-T1-LABEL: check_simple:
; CHECK-T1: push {r3, r4, r5, r6, r7, lr}
@@ -44,11 +44,11 @@ define void @check_simple() minsize {
define void @check_simple_too_big() minsize {
; CHECK-LABEL: check_simple_too_big:
; CHECK: push.w {r11, lr}
; CHECK: push {r7, lr}
; CHECK: sub sp,
; ...
; CHECK: add sp,
; CHECK: pop.w {r11, pc}
; CHECK: pop {r7, pc}
%var = alloca i8, i32 64
call void @bar(i8* %var)
ret void
@@ -93,11 +93,11 @@ define void @check_vfp_fold() minsize {
; folded in except that doing so would clobber the value being returned.
define i64 @check_no_return_clobber() minsize {
; CHECK-LABEL: check_no_return_clobber:
; CHECK: push.w {r5, r6, r7, r8, r9, r10, r11, lr}
; CHECK: push {r1, r2, r3, r4, r5, r6, r7, lr}
; CHECK-NOT: sub sp,
; ...
; CHECK: add sp, #24
; CHECK: pop.w {r11, pc}
; CHECK: pop {r7, pc}
; Just to keep iOS FileCheck within previous function:
; CHECK-IOS-LABEL: check_no_return_clobber:
@@ -176,9 +176,9 @@ define void @test_varsize(...) minsize {
; CHECK-LABEL: test_varsize:
; CHECK: sub sp, #16
; CHECK: push.w {r9, r10, r11, lr}
; CHECK: push {r5, r6, r7, lr}
; ...
; CHECK: pop.w {r2, r3, r11, lr}
; CHECK: pop.w {r2, r3, r7, lr}
; CHECK: add sp, #16
; CHECK: bx lr