mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-06 06:33:24 +00:00
Add a new method which enables one to change register classes.
See the Mips16ISetLowering.cpp patch to see a use of this. For now now the extra code in Mips16ISetLowering.cpp is a nop but is used for test purposes. Mips32 registers are setup and then removed and then the Mips16 registers are setup. Normally you need to add register classes and then call computeRegisterProperties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177120 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
c184a5f4ca
commit
f8b0a08b6a
@ -958,6 +958,13 @@ protected:
|
||||
RegClassForVT[VT.SimpleTy] = RC;
|
||||
}
|
||||
|
||||
/// clearRegisterClasses - remove all register classes
|
||||
void clearRegisterClasses() {
|
||||
for (unsigned i = 0 ; i<array_lengthof(RegClassForVT); i++)
|
||||
RegClassForVT[i] = 0;
|
||||
AvailableRegClasses.clear();
|
||||
}
|
||||
|
||||
/// findRepresentativeClass - Return the largest legal super-reg register class
|
||||
/// of the register class for the specified type and its associated "cost".
|
||||
virtual std::pair<const TargetRegisterClass*, uint8_t>
|
||||
|
@ -39,6 +39,14 @@ namespace {
|
||||
|
||||
Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM)
|
||||
: MipsTargetLowering(TM) {
|
||||
//
|
||||
// set up as if mips32 and then revert so we can test the mechanism
|
||||
// for switching
|
||||
addRegisterClass(MVT::i32, &Mips::CPURegsRegClass);
|
||||
addRegisterClass(MVT::f32, &Mips::FGR32RegClass);
|
||||
computeRegisterProperties();
|
||||
clearRegisterClasses();
|
||||
|
||||
// Set up the register classes
|
||||
addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user