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Remove assert as the only integer registers on the sparc are physical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11317 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -29,7 +29,6 @@
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#include "llvm/CodeGen/MachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetData.h"
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#include "Support/Debug.h"
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#include "Support/Debug.h"
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@ -659,8 +658,6 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
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}
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}
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} else if (MO.isRegister() || MO.getType() == MachineOperand::MO_CCRegister)
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} else if (MO.isRegister() || MO.getType() == MachineOperand::MO_CCRegister)
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{
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{
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"virtual register in machine code!");
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// This is necessary because the Sparc backend doesn't actually lay out
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// This is necessary because the Sparc backend doesn't actually lay out
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// registers in the real fashion -- it skips those that it chooses not to
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// registers in the real fashion -- it skips those that it chooses not to
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// allocate, i.e. those that are the FP, SP, etc.
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// allocate, i.e. those that are the FP, SP, etc.
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