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Hexagon: Clear isKill flag on the predicate register in

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PredicateInstruction function.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180884 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jyotsna Verma 2013-05-01 21:27:30 +00:00
parent 58c3aa2049
commit f9759c9f08
1 changed files with 5 additions and 1 deletions
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6
lib/Target/Hexagon/HexagonInstrInfo.cpp
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@ -1811,11 +1811,15 @@ PredicateInstruction(MachineInstr *MI,
// It is better to have an assert here to check this. But I don't know how // It is better to have an assert here to check this. But I don't know how
// to write this assert because findFirstPredOperandIdx() would return -1 // to write this assert because findFirstPredOperandIdx() would return -1
if (oper < -1) oper = -1; if (oper < -1) oper = -1;
MI->getOperand(oper+1).ChangeToRegister(PredMO.getReg(), PredMO.isDef(), MI->getOperand(oper+1).ChangeToRegister(PredMO.getReg(), PredMO.isDef(),
PredMO.isImplicit(), PredMO.isKill(), PredMO.isImplicit(), false,
PredMO.isDead(), PredMO.isUndef(), PredMO.isDead(), PredMO.isUndef(),
PredMO.isDebug()); PredMO.isDebug());
MachineRegisterInfo &RegInfo = MI->getParent()->getParent()->getRegInfo();
RegInfo.clearKillFlags(PredMO.getReg());
if (hasGAOpnd) if (hasGAOpnd)
{ {
unsigned int i; unsigned int i;