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add enough support for indirect branch for the feature test to pass

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(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85274 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2009-10-27 19:13:16 +00:00
parent 76b39e88e4
commit f9be95f867
17 changed files with 482 additions and 101 deletions
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25
lib/Bitcode/Reader/BitcodeReader.cpp
View File

@ -1951,7 +1951,7 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
}
break;
}
case bitc::FUNC_CODE_INST_SWITCH: { // SWITCH: [opty, opval, n, n x ops]
case bitc::FUNC_CODE_INST_SWITCH: { // SWITCH: [opty, op0, op1, ...]
if (Record.size() < 3 || (Record.size() & 1) == 0)
return Error("Invalid SWITCH record");
const Type *OpTy = getTypeByID(Record[0]);
@ -1975,7 +1975,28 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
I = SI;
break;
}
case bitc::FUNC_CODE_INST_INDBR: { // INDBR: [opty, op0, op1, ...]
if (Record.size() < 2)
return Error("Invalid INDBR record");
const Type *OpTy = getTypeByID(Record[0]);
Value *Address = getFnValueByID(Record[1], OpTy);
if (OpTy == 0 || Address == 0)
return Error("Invalid INDBR record");
unsigned NumDests = Record.size()-2;
IndBrInst *IBI = IndBrInst::Create(Address, NumDests);
InstructionList.push_back(IBI);
for (unsigned i = 0, e = NumDests; i != e; ++i) {
if (BasicBlock *DestBB = getBasicBlock(Record[2+i])) {
IBI->addDestination(DestBB);
} else {
delete IBI;
return Error("Invalid INDBR record!");
}
}
I = IBI;
break;
}
case bitc::FUNC_CODE_INST_INVOKE: {
// INVOKE: [attrs, cc, normBB, unwindBB, fnty, op0,op1,op2, ...]
if (Record.size() < 4) return Error("Invalid INVOKE record");

9
lib/Bitcode/Writer/BitcodeWriter.cpp
View File

@ -1001,7 +1001,7 @@ static void WriteInstruction(const Instruction &I, unsigned InstID,
case Instruction::Br:
{
Code = bitc::FUNC_CODE_INST_BR;
BranchInst &II(cast<BranchInst>(I));
BranchInst &II = cast<BranchInst>(I);
Vals.push_back(VE.getValueID(II.getSuccessor(0)));
if (II.isConditional()) {
Vals.push_back(VE.getValueID(II.getSuccessor(1)));
@ -1015,6 +1015,13 @@ static void WriteInstruction(const Instruction &I, unsigned InstID,
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i)));
break;
case Instruction::IndBr:
Code = bitc::FUNC_CODE_INST_INDBR;
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i)));
break;
case Instruction::Invoke: {
const InvokeInst *II = cast<InvokeInst>(&I);
const Value *Callee(II->getCalledValue());