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Allow targets to add custom asm operand matching logic.
For example, ARM has several instructions with a literal '#0' immediate in the syntax that's not represented as an actual operand. The asm matcher is expected a token operand, but the parser will have created an immediate operand. This is currently handled by dedicated per-instruction C++ munging of the ParsedAsmOperand list, but will be better handled by this hook. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174487 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -142,6 +142,15 @@ public:
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MCStreamer &Out, unsigned &ErrorInfo,
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bool MatchingInlineAsm) = 0;
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/// Allow a target to add special case operand matching for things that
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/// tblgen doesn't/can't handle effectively. For example, literal
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/// immediates on ARM. TableGen expects a token operand, but the parser
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/// will recognize them as immediates.
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virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op,
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unsigned Kind) {
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return Match_InvalidOperand;
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}
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/// checkTargetMatchPredicate - Validate the instruction match against
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/// any complex target predicates not expressible via match classes.
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virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
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@ -2878,6 +2878,15 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << "(MatchClassKind)it->Classes[i]);\n";
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OS << " if (Diag == Match_Success)\n";
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OS << " continue;\n";
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OS << " // If the generic handler indicates an invalid operand\n";
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OS << " // failure, check for a special case.\n";
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OS << " if (Diag == Match_InvalidOperand) {\n";
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OS << " Diag = validateTargetOperandClass(Operands[i+1],\n";
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OS.indent(43);
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OS << "(MatchClassKind)it->Classes[i]);\n";
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OS << " if (Diag == Match_Success)\n";
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OS << " continue;\n";
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OS << " }\n";
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OS << " // If this operand is broken for all of the instances of this\n";
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OS << " // mnemonic, keep track of it so we can report loc info.\n";
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OS << " // If we already had a match that only failed due to a\n";
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