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Use getTargetConstant instead of getConstant for nodes that should not be visited

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by isel and potentially forced into registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58747 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-11-05 02:06:09 +00:00
parent c96a8e7df1
commit fa210d8dd1
1 changed files with 8 additions and 8 deletions
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16
lib/Target/CellSPU/SPUISelLowering.cpp
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@@ -1332,7 +1332,7 @@ SDValue SPU::get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
Value = Value >> 32; Value = Value >> 32;
} }
if (Value <= 0x3ffff) if (Value <= 0x3ffff)
return DAG.getConstant(Value, ValueType); return DAG.getTargetConstant(Value, ValueType);
} }
return SDValue(); return SDValue();
@@ -1354,7 +1354,7 @@ SDValue SPU::get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
Value = Value >> 32; Value = Value >> 32;
} }
if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) { if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) {
return DAG.getConstant(Value, ValueType); return DAG.getTargetConstant(Value, ValueType);
} }
} }
@@ -1377,7 +1377,7 @@ SDValue SPU::get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
Value = Value >> 32; Value = Value >> 32;
} }
if (isS10Constant(Value)) if (isS10Constant(Value))
return DAG.getConstant(Value, ValueType); return DAG.getTargetConstant(Value, ValueType);
} }
return SDValue(); return SDValue();
@@ -1397,10 +1397,10 @@ SDValue SPU::get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
if (ValueType == MVT::i16 if (ValueType == MVT::i16
&& Value <= 0xffff /* truncated from uint64_t */ && Value <= 0xffff /* truncated from uint64_t */
&& ((short) Value >> 8) == ((short) Value & 0xff)) && ((short) Value >> 8) == ((short) Value & 0xff))
return DAG.getConstant(Value & 0xff, ValueType); return DAG.getTargetConstant(Value & 0xff, ValueType);
else if (ValueType == MVT::i8 else if (ValueType == MVT::i8
&& (Value & 0xff) == Value) && (Value & 0xff) == Value)
return DAG.getConstant(Value, ValueType); return DAG.getTargetConstant(Value, ValueType);
} }
return SDValue(); return SDValue();
@@ -1416,7 +1416,7 @@ SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
if ((ValueType == MVT::i32 if ((ValueType == MVT::i32
&& ((unsigned) Value & 0xffff0000) == (unsigned) Value) && ((unsigned) Value & 0xffff0000) == (unsigned) Value)
|| (ValueType == MVT::i64 && (Value & 0xffff0000) == Value)) || (ValueType == MVT::i64 && (Value & 0xffff0000) == Value))
return DAG.getConstant(Value >> 16, ValueType); return DAG.getTargetConstant(Value >> 16, ValueType);
} }
return SDValue(); return SDValue();
@@ -1425,7 +1425,7 @@ SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
/// get_v4i32_imm - Catch-all for general 32-bit constant vectors /// get_v4i32_imm - Catch-all for general 32-bit constant vectors
SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) { SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
if (ConstantSDNode *CN = getVecImm(N)) { if (ConstantSDNode *CN = getVecImm(N)) {
return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i32); return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i32);
} }
return SDValue(); return SDValue();
@@ -1434,7 +1434,7 @@ SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
/// get_v4i32_imm - Catch-all for general 64-bit constant vectors /// get_v4i32_imm - Catch-all for general 64-bit constant vectors
SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) { SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
if (ConstantSDNode *CN = getVecImm(N)) { if (ConstantSDNode *CN = getVecImm(N)) {
return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i64); return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i64);
} }
return SDValue(); return SDValue();