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Switch most getReservedRegs() clients to the MRI equivalent.

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Using the cached bit vector in MRI avoids comstantly allocating and
recomputing the reserved register bit vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-10-15 21:57:41 +00:00
parent e4f273908b
commit fb9ebbf236
12 changed files with 28 additions and 52 deletions
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10
lib/CodeGen/RegisterClassInfo.cpp
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@@ -15,8 +15,9 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "regalloc"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
@@ -57,10 +58,11 @@ void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) {
CalleeSaved = CSR;
// Different reserved registers?
BitVector RR = TRI->getReservedRegs(*MF);
if (RR != Reserved)
const BitVector &RR = MF->getRegInfo().getReservedRegs();
if (Reserved.size() != RR.size() || RR != Reserved) {
Update = true;
Reserved = RR;
Reserved = RR;
}
// Invalidate cached information from previous function.
if (Update)