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https://github.com/c64scene-ar/llvm-6502.git
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Remove useMachineScheduler and replace it with subtarget options
that control, individually, all of the disparate things it was controlling. At the same time move a FIXME in the Hexagon port to a new subtarget function that will enable a user of the machine scheduler to avoid using the source scheduler for pre-RA-scheduling. The FIXME would have this removed, but involves either testcase changes or adding -pre-RA-sched=source to a few testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231980 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -55,9 +55,6 @@ static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
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static cl::opt<cl::boolOrDefault>
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OptimizeRegAlloc("optimize-regalloc", cl::Hidden,
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cl::desc("Enable optimized register allocation compilation path."));
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static cl::opt<cl::boolOrDefault>
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EnableMachineSched("enable-misched",
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cl::desc("Enable the machine instruction scheduling pass."));
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static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
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cl::Hidden,
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cl::desc("Disable Machine LICM"));
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@ -116,28 +113,6 @@ static IdentifyingPassPtr applyDisable(IdentifyingPassPtr PassID,
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return PassID;
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}
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/// Allow Pass selection to be overriden by command line options. This supports
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/// flags with ternary conditions. TargetID is passed through by default. The
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/// pass is suppressed when the option is false. When the option is true, the
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/// StandardID is selected if the target provides no default.
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static IdentifyingPassPtr applyOverride(IdentifyingPassPtr TargetID,
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cl::boolOrDefault Override,
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AnalysisID StandardID) {
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switch (Override) {
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case cl::BOU_UNSET:
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return TargetID;
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case cl::BOU_TRUE:
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if (TargetID.isValid())
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return TargetID;
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if (StandardID == nullptr)
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report_fatal_error("Target cannot enable pass");
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return StandardID;
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case cl::BOU_FALSE:
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return IdentifyingPassPtr();
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}
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llvm_unreachable("Invalid command line option state");
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}
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/// Allow standard passes to be disabled by the command line, regardless of who
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/// is adding the pass.
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///
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@ -182,9 +157,6 @@ static IdentifyingPassPtr overridePass(AnalysisID StandardID,
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if (StandardID == &MachineCSEID)
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return applyDisable(TargetID, DisableMachineCSE);
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if (StandardID == &MachineSchedulerID)
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return applyOverride(TargetID, EnableMachineSched, StandardID);
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if (StandardID == &TargetPassConfig::PostRAMachineLICMID)
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return applyDisable(TargetID, DisablePostRAMachineLICM);
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@ -249,11 +221,6 @@ TargetPassConfig::TargetPassConfig(TargetMachine *tm, PassManagerBase &pm)
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// Substitute Pseudo Pass IDs for real ones.
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substitutePass(&EarlyTailDuplicateID, &TailDuplicateID);
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substitutePass(&PostRAMachineLICMID, &MachineLICMID);
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// Temporarily disable experimental passes.
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const TargetSubtargetInfo &ST = *TM->getSubtargetImpl();
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if (!ST.useMachineScheduler())
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disablePass(&MachineSchedulerID);
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}
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/// Insert InsertedPassID pass after TargetPassID.
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