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ARM assembler support for ldmfd/stmfd mnemonics.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133936 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-06-27 20:32:18 +00:00
parent 34720e193f
commit fbd01783a6
2 changed files with 10 additions and 0 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
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@ -2006,6 +2006,8 @@ defm STM : arm_ldst_mult<"stm", 0, LdStMulFrm, IIC_iStore_m, IIC_iStore_mu>;
} // neverHasSideEffects } // neverHasSideEffects
// Load / Store Multiple Mnemonic Aliases // Load / Store Multiple Mnemonic Aliases
def : MnemonicAlias<"ldmfd", "ldmia">;
def : MnemonicAlias<"stmfd", "stmdb">;
def : MnemonicAlias<"ldm", "ldmia">; def : MnemonicAlias<"ldm", "ldmia">;
def : MnemonicAlias<"stm", "stmia">; def : MnemonicAlias<"stm", "stmia">;

8
test/MC/ARM/arm_instructions.s
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@ -20,23 +20,31 @@
@ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2]
vqdmull.s32 q8, d17, d16 vqdmull.s32 q8, d17, d16
@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] @ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] @ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9]
@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8]
@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] @ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9]
@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
ldm r2, {r1,r3-r6,sp}
ldmia r2, {r1,r3-r6,sp} ldmia r2, {r1,r3-r6,sp}
ldmib r2, {r1,r3-r6,sp} ldmib r2, {r1,r3-r6,sp}
ldmda r2, {r1,r3-r6,sp} ldmda r2, {r1,r3-r6,sp}
ldmdb r2, {r1,r3-r6,sp} ldmdb r2, {r1,r3-r6,sp}
ldmfd r2, {r1,r3-r6,sp}
@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8]
@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] @ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8]
@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] @ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9]
@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] @ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8]
@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] @ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9]
@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9]
stm r2, {r1,r3-r6,sp}
stmia r2, {r1,r3-r6,sp} stmia r2, {r1,r3-r6,sp}
stmib r2, {r1,r3-r6,sp} stmib r2, {r1,r3-r6,sp}
stmda r2, {r1,r3-r6,sp} stmda r2, {r1,r3-r6,sp}
stmdb r2, {r1,r3-r6,sp} stmdb r2, {r1,r3-r6,sp}
stmfd r2, {r1,r3-r6,sp}
@ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] @ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8]
@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] @ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9]