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Update insertps handling based on feedback. Move to a v4f32 style

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to support vector arguments and scalar arguments correctly. Update
lowering and fix comment to refer to pinsr* instead of insertps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76921 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2009-07-24 00:33:09 +00:00
parent d2cb3d2c32
commit fbd6687cf1
2 changed files with 15 additions and 18 deletions
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9
lib/Target/X86/X86ISelLowering.cpp
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@@ -4383,11 +4383,12 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG){
// Bits [3:0] of the constant are the zero mask. The DAG Combiner may
// combine either bitwise AND or insert of float 0.0 to set these bits.
N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getZExtValue() << 4);
// Create this as a scalar to vector..
N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1);
return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2);
} else if (EVT == MVT::i32) {
// InsertPS works with constant index.
if (isa<ConstantSDNode>(N2))
return Op;
} else if (EVT == MVT::i32 && isa<ConstantSDNode>(N2)) {
// PINSR* works with constant index.
return Op;
}
return SDValue();
}