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MIR Serialization: Serialize the machine basic block's successor weights.
Reviewers: Duncan P. N. Exon Smith git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243659 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -356,12 +356,24 @@ bool MIRParserImpl::initializeMachineBasicBlock(
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MBB.setIsLandingPad(YamlMBB.IsLandingPad);
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SMDiagnostic Error;
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// Parse the successors.
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const auto &Weights = YamlMBB.SuccessorWeights;
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bool HasWeights = !Weights.empty();
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if (HasWeights && Weights.size() != YamlMBB.Successors.size()) {
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bool IsFew = Weights.size() < YamlMBB.Successors.size();
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return error(IsFew ? Weights.back().SourceRange.End
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: Weights[YamlMBB.Successors.size()].SourceRange.Start,
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Twine("too ") + (IsFew ? "few" : "many") +
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" successor weights, expected " +
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Twine(YamlMBB.Successors.size()) + ", have " +
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Twine(Weights.size()));
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}
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size_t SuccessorIndex = 0;
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for (const auto &MBBSource : YamlMBB.Successors) {
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MachineBasicBlock *SuccMBB = nullptr;
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if (parseMBBReference(SuccMBB, MBBSource, MF, PFS))
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return true;
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// TODO: Report an error when adding the same successor more than once.
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MBB.addSuccessor(SuccMBB);
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MBB.addSuccessor(SuccMBB, HasWeights ? Weights[SuccessorIndex++].Value : 0);
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}
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// Parse the liveins.
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for (const auto &LiveInSource : YamlMBB.LiveIns) {
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@ -56,6 +56,10 @@ struct FrameIndexOperand {
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}
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};
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} // end anonymous namespace
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namespace llvm {
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/// This class prints out the machine functions using the MIR serialization
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/// format.
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class MIRPrinter {
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@ -88,6 +92,10 @@ private:
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void initRegisterMaskIds(const MachineFunction &MF);
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};
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} // end namespace llvm
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namespace {
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/// This class prints out the machine instructions using the MIR serialization
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/// format.
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class MIPrinter {
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@ -363,6 +371,11 @@ void MIRPrinter::convert(ModuleSlotTracker &MST,
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.printMBBReference(*SuccMBB);
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YamlMBB.Successors.push_back(StrOS.str());
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}
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if (MBB.hasSuccessorWeights()) {
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for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I)
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YamlMBB.SuccessorWeights.push_back(
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yaml::UnsignedValue(MBB.getSuccWeight(I)));
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}
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// Print the live in registers.
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const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo();
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assert(TRI && "Expected target register info");
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