6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-01 15:11:24 +00:00
Code Issues Projects Releases Wiki Activity

[mips][sched] Removed IIXfer. No instructions use it.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199403 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-01-16 17:23:08 +00:00
parent 89d1caaa1b
commit fbe67dabad
1 changed files with 0 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/Mips/MipsSchedule.td
View File

@ -19,7 +19,6 @@ def IMULDIV : FuncUnit;
def IIAlu : InstrItinClass;
def IILoad : InstrItinClass;
def IIStore : InstrItinClass;
def IIXfer : InstrItinClass;
def IIBranch : InstrItinClass;
def IIHiLo : InstrItinClass;
def IIImul : InstrItinClass;
@ -132,7 +131,6 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [
InstrItinData<II_XORI , [InstrStage<1, [ALU]>]>,
InstrItinData<IILoad , [InstrStage<3, [ALU]>]>,
InstrItinData<IIStore , [InstrStage<1, [ALU]>]>,
InstrItinData<IIXfer , [InstrStage<2, [ALU]>]>,
InstrItinData<IIBranch , [InstrStage<1, [ALU]>]>,
InstrItinData<IIHiLo , [InstrStage<1, [IMULDIV]>]>,
InstrItinData<IIImul , [InstrStage<17, [IMULDIV]>]>,