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https://github.com/c64scene-ar/llvm-6502.git
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Add missing ELF constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141840 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael J. Spencer
parent
dee83c90bb
commit
fc61a23506
@ -126,22 +126,170 @@ enum {
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// Machine architectures
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enum {
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EM_NONE = 0, // No machine
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EM_M32 = 1, // AT&T WE 32100
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EM_SPARC = 2, // SPARC
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EM_386 = 3, // Intel 386
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EM_68K = 4, // Motorola 68000
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EM_88K = 5, // Motorola 88000
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EM_486 = 6, // Intel 486 (deprecated)
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EM_860 = 7, // Intel 80860
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EM_MIPS = 8, // MIPS R3000
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EM_PPC = 20, // PowerPC
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EM_PPC64 = 21, // PowerPC64
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EM_ARM = 40, // ARM
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EM_ALPHA = 41, // DEC Alpha
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EM_SPARCV9 = 43, // SPARC V9
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EM_X86_64 = 62, // AMD64
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EM_MBLAZE = 47787 // Xilinx MicroBlaze
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EM_NONE = 0, // No machine
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EM_M32 = 1, // AT&T WE 32100
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EM_SPARC = 2, // SPARC
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EM_386 = 3, // Intel 386
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EM_68K = 4, // Motorola 68000
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EM_88K = 5, // Motorola 88000
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EM_486 = 6, // Intel 486 (deprecated)
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EM_860 = 7, // Intel 80860
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EM_MIPS = 8, // MIPS R3000
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EM_S370 = 9, // IBM System/370
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EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian
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EM_PARISC = 15, // Hewlett-Packard PA-RISC
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EM_VPP500 = 17, // Fujitsu VPP500
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EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC
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EM_960 = 19, // Intel 80960
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EM_PPC = 20, // PowerPC
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EM_PPC64 = 21, // PowerPC64
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EM_S390 = 22, // IBM System/390
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EM_SPU = 23, // IBM SPU/SPC
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EM_V800 = 36, // NEC V800
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EM_FR20 = 37, // Fujitsu FR20
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EM_RH32 = 38, // TRW RH-32
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EM_RCE = 39, // Motorola RCE
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EM_ARM = 40, // ARM
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EM_ALPHA = 41, // DEC Alpha
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EM_SH = 42, // Hitachi SH
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EM_SPARCV9 = 43, // SPARC V9
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EM_TRICORE = 44, // Siemens TriCore
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EM_ARC = 45, // Argonaut RISC Core
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EM_H8_300 = 46, // Hitachi H8/300
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EM_H8_300H = 47, // Hitachi H8/300H
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EM_H8S = 48, // Hitachi H8S
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EM_H8_500 = 49, // Hitachi H8/500
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EM_IA_64 = 50, // Intel IA-64 processor architecture
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EM_MIPS_X = 51, // Stanford MIPS-X
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EM_COLDFIRE = 52, // Motorola ColdFire
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EM_68HC12 = 53, // Motorola M68HC12
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EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator
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EM_PCP = 55, // Siemens PCP
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EM_NCPU = 56, // Sony nCPU embedded RISC processor
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EM_NDR1 = 57, // Denso NDR1 microprocessor
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EM_STARCORE = 58, // Motorola Star*Core processor
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EM_ME16 = 59, // Toyota ME16 processor
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EM_ST100 = 60, // STMicroelectronics ST100 processor
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EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family
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EM_X86_64 = 62, // AMD x86-64 architecture
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EM_PDSP = 63, // Sony DSP Processor
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EM_PDP10 = 64, // Digital Equipment Corp. PDP-10
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EM_PDP11 = 65, // Digital Equipment Corp. PDP-11
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EM_FX66 = 66, // Siemens FX66 microcontroller
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EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller
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EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller
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EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller
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EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller
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EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller
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EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller
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EM_SVX = 73, // Silicon Graphics SVx
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EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller
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EM_VAX = 75, // Digital VAX
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EM_CRIS = 76, // Axis Communications 32-bit embedded processor
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EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor
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EM_FIREPATH = 78, // Element 14 64-bit DSP Processor
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EM_ZSP = 79, // LSI Logic 16-bit DSP Processor
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EM_MMIX = 80, // Donald Knuth's educational 64-bit processor
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EM_HUANY = 81, // Harvard University machine-independent object files
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EM_PRISM = 82, // SiTera Prism
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EM_AVR = 83, // Atmel AVR 8-bit microcontroller
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EM_FR30 = 84, // Fujitsu FR30
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EM_D10V = 85, // Mitsubishi D10V
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EM_D30V = 86, // Mitsubishi D30V
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EM_V850 = 87, // NEC v850
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EM_M32R = 88, // Mitsubishi M32R
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EM_MN10300 = 89, // Matsushita MN10300
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EM_MN10200 = 90, // Matsushita MN10200
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EM_PJ = 91, // picoJava
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EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor
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EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old
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// spelling/synonym: EM_ARC_A5)
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EM_XTENSA = 94, // Tensilica Xtensa Architecture
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EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor
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EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor
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EM_NS32K = 97, // National Semiconductor 32000 series
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EM_TPC = 98, // Tenor Network TPC processor
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EM_SNP1K = 99, // Trebia SNP 1000 processor
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EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200
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EM_IP2K = 101, // Ubicom IP2xxx microcontroller family
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EM_MAX = 102, // MAX Processor
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EM_CR = 103, // National Semiconductor CompactRISC microprocessor
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EM_F2MC16 = 104, // Fujitsu F2MC16
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EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430
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EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor
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EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors
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EM_SEP = 108, // Sharp embedded microprocessor
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EM_ARCA = 109, // Arca RISC Microprocessor
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EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC
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// of Peking University
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EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU
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EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor
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EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor
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EM_CRX = 114, // National Semiconductor CompactRISC CRX
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EM_XGATE = 115, // Motorola XGATE embedded processor
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EM_C166 = 116, // Infineon C16x/XC16x processor
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EM_M16C = 117, // Renesas M16C series microprocessors
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EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal
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// Controller
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EM_CE = 119, // Freescale Communication Engine RISC core
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EM_M32C = 120, // Renesas M32C series microprocessors
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EM_TSK3000 = 131, // Altium TSK3000 core
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EM_RS08 = 132, // Freescale RS08 embedded processor
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EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP
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// processors
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EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor
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EM_SCORE7 = 135, // Sunplus S+core7 RISC processor
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EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor
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EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor
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EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture
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EM_SE_C17 = 139, // Seiko Epson C17 family
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EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family
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EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family
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EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family
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EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor
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EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor
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EM_R32C = 162, // Renesas R32C series microprocessors
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EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family
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EM_QDSP6 = 164, // QUALCOMM DSP6 Processor
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EM_8051 = 165, // Intel 8051 and variants
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EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable
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// and extensible RISC processors
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EM_NDS32 = 167, // Andes Technology compact code size embedded RISC
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// processor family
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EM_ECOG1 = 168, // Cyan Technology eCOG1X family
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EM_ECOG1X = 168, // Cyan Technology eCOG1X family
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EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers
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EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor
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EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor
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EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture
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EM_RX = 173, // Renesas RX family
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EM_METAG = 174, // Imagination Technologies META processor
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// architecture
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EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture
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EM_ECOG16 = 176, // Cyan Technology eCOG16 family
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EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit
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// microprocessor
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EM_ETPU = 178, // Freescale Extended Time Processing Unit
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EM_SLE9X = 179, // Infineon Technologies SLE9X core
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EM_L10M = 180, // Intel L10M
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EM_K10M = 181, // Intel K10M
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EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family
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EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller
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EM_TILE64 = 187, // Tilera TILE64 multicore architecture family
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EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family
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EM_MICROBLAZE = 189, // Xilinx MicroBlaze 32-bit RISC soft processor core
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EM_CUDA = 190, // NVIDIA CUDA architecture
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EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family
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EM_CLOUDSHIELD = 192, // CloudShield architecture family
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EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family
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EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family
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EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2
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EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core
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EM_RL78 = 197, // Renesas RL78 family
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EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor
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EM_78KOR = 199, // Renesas 78KOR family
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EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC)
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EM_MBLAZE = 47787 // Xilinx MicroBlaze
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};
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// Object file classes.
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@ -211,6 +359,11 @@ enum {
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R_X86_64_PC64 = 24,
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R_X86_64_GOTOFF64 = 25,
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R_X86_64_GOTPC32 = 26,
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R_X86_64_GOT64 = 27,
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R_X86_64_GOTPCREL64 = 28,
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R_X86_64_GOTPC64 = 29,
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R_X86_64_GOTPLT64 = 30,
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R_X86_64_PLTOFF64 = 31,
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R_X86_64_SIZE32 = 32,
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R_X86_64_SIZE64 = 33,
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R_X86_64_GOTPC32_TLSDESC = 34,
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@ -484,6 +637,8 @@ enum {
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SHN_LORESERVE = 0xff00, // Lowest reserved index
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SHN_LOPROC = 0xff00, // Lowest processor-specific index
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SHN_HIPROC = 0xff1f, // Highest processor-specific index
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SHN_LOOS = 0xff20, // Lowest operating system-specific index
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SHN_HIOS = 0xff3f, // Highest operating system-specific index
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SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation
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SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables
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SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE
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@ -574,8 +729,19 @@ enum {
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/// set to the start of the section by the boot code.
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XCORE_SHF_DP_SECTION = 0x1000U,
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SHF_MASKOS = 0x0ff00000,
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// Bits indicating processor-specific flags.
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SHF_MASKPROC = 0xf0000000
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SHF_MASKPROC = 0xf0000000,
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// If an object file section does not have this flag set, then it may not hold
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// more than 2GB and can be freely referred to in objects using smaller code
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// models. Otherwise, only objects using larger code models can refer to them.
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// For example, a medium code model object can refer to data in a section that
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// sets this flag besides being able to refer to data in a section that does
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// not set it; likewise, a small code model object can refer only to code in a
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// section that does not set this flag.
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SHF_X86_64_LARGE = 0x10000000
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};
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// Section Group Flags
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@ -636,6 +802,8 @@ enum {
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STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def
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STB_GLOBAL = 1, // Global symbol, visible to all object files being combined
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STB_WEAK = 2, // Weak symbol, like global but lower-precedence
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STB_LOOS = 10, // Lowest operating system-specific binding type
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STB_HIOS = 12, // Highest operating system-specific binding type
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STB_LOPROC = 13, // Lowest processor-specific binding type
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STB_HIPROC = 15 // Highest processor-specific binding type
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};
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@ -649,6 +817,8 @@ enum {
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STT_FILE = 4, // Local, absolute symbol that refers to a file
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STT_COMMON = 5, // An uninitialized common block
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STT_TLS = 6, // Thread local data object
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STT_LOOS = 7, // Lowest operating system-specific symbol type
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STT_HIOS = 8, // Highest operating system-specific symbol type
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STT_LOPROC = 13, // Lowest processor-specific symbol type
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STT_HIPROC = 15 // Highest processor-specific symbol type
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};
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@ -763,6 +933,16 @@ enum {
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PT_NOTE = 4, // Auxiliary information.
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PT_SHLIB = 5, // Reserved.
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PT_PHDR = 6, // The program header table itself.
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PT_TLS = 7, // The thread-local storage template.
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PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type.
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// x86-64 program header types.
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// These all contain stack unwind tables.
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PT_GNU_EH_FRAME = 0x6474e550,
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PT_SUNW_EH_FRAME = 0x6474e550,
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PT_SUNW_UNWIND = 0x6464e550,
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PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type.
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PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type.
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PT_HIPROC = 0x7fffffff // Highest processor-specific program hdr entry type.
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};
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@ -772,7 +952,8 @@ enum {
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PF_X = 1, // Execute
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PF_W = 2, // Write
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PF_R = 4, // Read
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PF_MASKPROC = 0xf0000000 // Unspecified
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PF_MASKOS = 0x0ff00000,// Bits for operating system-specific semantics.
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PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics.
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};
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// Dynamic table entry for ELF32.
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@ -828,12 +1009,29 @@ enum {
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DT_FINI_ARRAY = 26, // Pointer to array of termination functions.
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DT_INIT_ARRAYSZ = 27, // Size of DT_INIT_ARRAY.
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DT_FINI_ARRAYSZ = 28, // Size of DT_FINI_ARRAY.
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DT_RUNPATH = 29, // String table offset of lib search path.
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DT_FLAGS = 30, // Flags.
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DT_ENCODING = 32, // Values from here to DT_LOOS follow the rules
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// for the interpretation of the d_un union.
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DT_PREINIT_ARRAY = 32, // Pointer to array of preinit functions.
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DT_PREINIT_ARRAYSZ = 33, // Size of the DT_PREINIT_ARRAY array.
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DT_LOOS = 0x60000000, // Start of environment specific tags.
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DT_HIOS = 0x6FFFFFFF, // End of environment specific tags.
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DT_LOPROC = 0x70000000, // Start of processor specific tags.
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DT_HIPROC = 0x7FFFFFFF // End of processor specific tags.
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};
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// DT_FLAGS values.
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enum {
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DF_ORIGIN = 0x01, // The object may reference $ORIGIN.
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DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe.
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DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment.
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DF_BIND_NOW = 0x08, // Process all relocations on load.
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DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically.
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};
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} // end namespace ELF
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} // end namespace llvm
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