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Add VirtRegMap::hasKnownPreference().

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Virtual registers with a known preferred register are prioritized by
RAGreedy. This function makes the condition explicit without depending
on getRegAllocPref().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-12-03 23:23:50 +00:00
parent ade047463f
commit fc6374439e
3 changed files with 15 additions and 1 deletions
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5
include/llvm/CodeGen/VirtRegMap.h
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@ -134,6 +134,11 @@ namespace llvm {
return getPhys(VirtReg) == getRegAllocPref(VirtReg); return getPhys(VirtReg) == getRegAllocPref(VirtReg);
} }
/// @brief returns true if VirtReg has a known preferred register.
/// This returns false if VirtReg has a preference that is a virtual
/// register that hasn't been assigned yet.
bool hasKnownPreference(unsigned VirtReg);
/// @brief records virtReg is a split live interval from SReg. /// @brief records virtReg is a split live interval from SReg.
void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
Virt2SplitMap[virtReg] = SReg; Virt2SplitMap[virtReg] = SReg;

2
lib/CodeGen/RegAllocGreedy.cpp
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@ -413,7 +413,7 @@ void RAGreedy::enqueue(LiveInterval *LI) {
Prio = (1u << 31) + Size; Prio = (1u << 31) + Size;
// Boost ranges that have a physical register hint. // Boost ranges that have a physical register hint.
if (TargetRegisterInfo::isPhysicalRegister(VRM->getRegAllocPref(Reg))) if (VRM->hasKnownPreference(Reg))
Prio |= (1u << 30); Prio |= (1u << 30);
} }

9
lib/CodeGen/VirtRegMap.cpp
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@ -88,6 +88,15 @@ unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) {
return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF); return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);
} }
bool VirtRegMap::hasKnownPreference(unsigned VirtReg) {
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(VirtReg);
if (TargetRegisterInfo::isPhysicalRegister(Hint.second))
return true;
if (TargetRegisterInfo::isVirtualRegister(Hint.second))
return hasPhys(Hint.second);
return false;
}
int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
assert(TargetRegisterInfo::isVirtualRegister(virtReg)); assert(TargetRegisterInfo::isVirtualRegister(virtReg));
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&