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[mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selects
multiply instructions in MipsSEDAGToDAGISel. This patch was supposed to be part of r178403. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179314 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -182,27 +182,6 @@ void MipsSEDAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) {
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replaceUsesWithZeroReg(MRI, *I);
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}
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/// Select multiply instructions.
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std::pair<SDNode*, SDNode*>
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MipsSEDAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
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bool HasLo, bool HasHi) {
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SDNode *Lo = 0, *Hi = 0;
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SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
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N->getOperand(1));
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SDValue InFlag = SDValue(Mul, 0);
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if (HasLo) {
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unsigned Opcode = (Ty == MVT::i32 ? Mips::MFLO : Mips::MFLO64);
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Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
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InFlag = SDValue(Lo, 1);
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}
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if (HasHi) {
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unsigned Opcode = (Ty == MVT::i32 ? Mips::MFHI : Mips::MFHI64);
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Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
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}
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return std::make_pair(Lo, Hi);
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}
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SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag,
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SDValue CmpLHS, DebugLoc DL,
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SDNode *Node) const {
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@ -312,9 +291,7 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
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// Instruction Selection not handled by the auto-generated
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// tablegen selection should be handled here.
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///
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EVT NodeTy = Node->getValueType(0);
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SDNode *Result;
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unsigned MultOpc;
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switch(Opcode) {
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default: break;
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@ -331,46 +308,6 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
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return std::make_pair(true, Result);
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}
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/// Mul with two results
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case ISD::SMUL_LOHI:
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case ISD::UMUL_LOHI: {
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if (NodeTy == MVT::i32)
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MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
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else
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MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::DMULTu : Mips::DMULT);
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std::pair<SDNode*, SDNode*> LoHi = selectMULT(Node, MultOpc, DL, NodeTy,
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true, true);
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if (!SDValue(Node, 0).use_empty())
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ReplaceUses(SDValue(Node, 0), SDValue(LoHi.first, 0));
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if (!SDValue(Node, 1).use_empty())
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ReplaceUses(SDValue(Node, 1), SDValue(LoHi.second, 0));
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return std::make_pair(true, (SDNode*)NULL);
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}
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/// Special Muls
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case ISD::MUL: {
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// Mips32 has a 32-bit three operand mul instruction.
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if (Subtarget.hasMips32() && NodeTy == MVT::i32)
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break;
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MultOpc = NodeTy == MVT::i32 ? Mips::MULT : Mips::DMULT;
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Result = selectMULT(Node, MultOpc, DL, NodeTy, true, false).first;
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return std::make_pair(true, Result);
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}
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case ISD::MULHS:
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case ISD::MULHU: {
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if (NodeTy == MVT::i32)
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MultOpc = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
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else
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MultOpc = (Opcode == ISD::MULHU ? Mips::DMULTu : Mips::DMULT);
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Result = selectMULT(Node, MultOpc, DL, NodeTy, false, true).second;
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return std::make_pair(true, Result);
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}
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case ISD::ConstantFP: {
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ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(Node);
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if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) {
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@ -68,8 +68,11 @@ MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM)
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setOperationAction(ISD::MULHS, MVT::i32, Custom);
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setOperationAction(ISD::MULHU, MVT::i32, Custom);
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if (HasMips64)
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if (HasMips64) {
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setOperationAction(ISD::MULHS, MVT::i64, Custom);
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setOperationAction(ISD::MULHU, MVT::i64, Custom);
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setOperationAction(ISD::MUL, MVT::i64, Custom);
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}
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setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
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setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
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