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https://github.com/c64scene-ar/llvm-6502.git
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Don't forget to emit the load from indirect symbol when using movw + movt to materialize GA indirect symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123809 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -54,6 +54,7 @@
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using namespace llvm;
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using namespace llvm;
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STATISTIC(NumTailCalls, "Number of tail calls");
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STATISTIC(NumTailCalls, "Number of tail calls");
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STATISTIC(NumMovwMovt, "Number of GAs materialized with movw + movt");
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// This option should go away when tail calls fully work.
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// This option should go away when tail calls fully work.
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static cl::opt<bool>
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static cl::opt<bool>
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@ -1955,6 +1956,7 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
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// If we have T2 ops, we can materialize the address directly via movt/movw
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// If we have T2 ops, we can materialize the address directly via movt/movw
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// pair. This is always cheaper.
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// pair. This is always cheaper.
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if (Subtarget->useMovt()) {
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if (Subtarget->useMovt()) {
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++NumMovwMovt;
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// FIXME: Once remat is capable of dealing with instructions with register
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// FIXME: Once remat is capable of dealing with instructions with register
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// operands, expand this into two nodes.
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// operands, expand this into two nodes.
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return DAG.getNode(ARMISD::Wrapper, dl, PtrVT,
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return DAG.getNode(ARMISD::Wrapper, dl, PtrVT,
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@ -1978,6 +1980,7 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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if (Subtarget->useMovt()) {
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if (Subtarget->useMovt()) {
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++NumMovwMovt;
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// FIXME: Once remat is capable of dealing with instructions with register
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// FIXME: Once remat is capable of dealing with instructions with register
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// operands, expand this into two nodes.
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// operands, expand this into two nodes.
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if (RelocM != Reloc::PIC_)
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if (RelocM != Reloc::PIC_)
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@ -1990,7 +1993,11 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
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SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT,
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SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT,
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DAG.getTargetGlobalAddress(GV, dl, PtrVT),
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DAG.getTargetGlobalAddress(GV, dl, PtrVT),
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PICLabel);
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PICLabel);
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return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
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Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
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if (Subtarget->GVIsIndirectSymbol(GV, RelocM))
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Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result,
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MachinePointerInfo::getGOT(), false, false, 0);
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return Result;
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}
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}
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unsigned ARMPCLabelIndex = 0;
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unsigned ARMPCLabelIndex = 0;
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@ -3403,16 +3403,16 @@ def Int_eh_sjlj_dispatchsetup :
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// This is a single pseudo instruction, the benefit is that it can be remat'd
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// This is a single pseudo instruction, the benefit is that it can be remat'd
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// as a single unit instead of having to handle reg inputs.
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// as a single unit instead of having to handle reg inputs.
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// FIXME: Remove this when we can do generalized remat.
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// FIXME: Remove this when we can do generalized remat.
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let isReMaterializable = 1, isMoveImm = 1 in {
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let isReMaterializable = 1, isMoveImm = 1 in
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def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
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def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
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[(set GPR:$dst, (arm_i32imm:$src))]>,
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[(set GPR:$dst, (arm_i32imm:$src))]>,
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Requires<[IsARM]>;
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Requires<[IsARM]>;
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let isReMaterializable = 1 in
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def MOV_pic_ga : PseudoInst<(outs GPR:$dst),
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def MOV_pic_ga : PseudoInst<(outs GPR:$dst),
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(ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
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(ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
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[(set GPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
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[(set GPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
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Requires<[IsARM, UseMovt]>;
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Requires<[IsARM, UseMovt]>;
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} // isReMaterializable = 1, isMoveImm = 1 in
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// ConstantPool, GlobalAddress, and JumpTable
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// ConstantPool, GlobalAddress, and JumpTable
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def : ARMPat<(ARMWrapper tglobaladdr :$dst), (LEApcrel tglobaladdr :$dst)>,
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def : ARMPat<(ARMWrapper tglobaladdr :$dst), (LEApcrel tglobaladdr :$dst)>,
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@ -3240,16 +3240,17 @@ def t2RFEIA : T2RFE<0b111010011001,
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// 32-bit immediate using movw + movt.
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// 32-bit immediate using movw + movt.
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// This is a single pseudo instruction to make it re-materializable.
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// This is a single pseudo instruction to make it re-materializable.
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// FIXME: Remove this when we can do generalized remat.
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// FIXME: Remove this when we can do generalized remat.
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let isReMaterializable = 1, isMoveImm = 1 in {
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let isReMaterializable = 1, isMoveImm = 1 in
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def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
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def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
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[(set rGPR:$dst, (i32 imm:$src))]>,
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[(set rGPR:$dst, (i32 imm:$src))]>,
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Requires<[IsThumb, HasV6T2]>;
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Requires<[IsThumb, HasV6T2]>;
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// Materialize GA with movw + movt.
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let isReMaterializable = 1 in
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def t2MOV_pic_ga : PseudoInst<(outs rGPR:$dst),
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def t2MOV_pic_ga : PseudoInst<(outs rGPR:$dst),
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(ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
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(ins i32imm:$addr, pclabel:$id), IIC_iMOVix2,
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[(set rGPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
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[(set rGPR:$dst, (ARMWrapperPIC tglobaladdr:$addr, imm:$id))]>,
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Requires<[IsThumb2, UseMovt]>;
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Requires<[IsThumb2, UseMovt]>;
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} // isReMaterializable = 1, isMoveImm = 1 in
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// ConstantPool, GlobalAddress, and JumpTable
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// ConstantPool, GlobalAddress, and JumpTable
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def : T2Pat<(ARMWrapper tglobaladdr :$dst), (t2LEApcrel tglobaladdr :$dst)>,
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def : T2Pat<(ARMWrapper tglobaladdr :$dst), (t2LEApcrel tglobaladdr :$dst)>,
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@ -153,7 +153,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
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if (UseMOVT && hasV6T2Ops()) {
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if (UseMOVT && hasV6T2Ops()) {
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unsigned Maj, Min, Rev;
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unsigned Maj, Min, Rev;
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TargetTriple.getDarwinNumber(Maj, Min, Rev);
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TargetTriple.getDarwinNumber(Maj, Min, Rev);
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UseMovt = (Maj > 4 || Min > 2);
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UseMovt = Maj > 4;
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}
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}
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}
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}
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