6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-04 05:17:07 +00:00
Code Issues Projects Releases Wiki Activity

Proper match halfword-imm operands for mov and add

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75920 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2009-07-16 13:34:24 +00:00
parent 89edcd0927
commit fc9ceeaad8
1 changed files with 14 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
lib/Target/SystemZ/SystemZInstrInfo.td
View File

@@ -66,6 +66,13 @@ def i64hh16 : PatLeaf<(i64 imm), [{
return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue()); return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue());
}], HH16>; }], HH16>;
def immSExt16 : PatLeaf<(i64 imm), [{
// immSExt16 predicate - true if the immediate fits in a 16-bit sign extended
// field.
uint64_t val = N->getZExtValue();
return ((int64_t)val == (int16_t)val);
}]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Control Flow Instructions... // Control Flow Instructions...
// //
@@ -87,9 +94,9 @@ def MOV64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src),
// FIXME: Provide proper encoding! // FIXME: Provide proper encoding!
let isReMaterializable = 1, isAsCheapAsAMove = 1 in { let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
def MOV64ri : Pseudo<(outs GR64:$dst), (ins i64imm:$src), def MOV64ri16 : Pseudo<(outs GR64:$dst), (ins i64imm:$src),
"lghi\t{$dst, $src}", "lghi\t{$dst, $src}",
[(set GR64:$dst, imm:$src)]>; [(set GR64:$dst, immSExt16:$src)]>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@@ -108,10 +115,10 @@ def ADD64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
} }
// FIXME: Provide proper encoding! // FIXME: Provide proper encoding!
def ADD64ri : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2), def ADD64ri16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
"aghi\t{$dst, $src2}", "aghi\t{$dst, $src2}",
[(set GR64:$dst, (add GR64:$src1, imm:$src2)), [(set GR64:$dst, (add GR64:$src1, immSExt16:$src2)),
(implicit PSW)]>; (implicit PSW)]>;
let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y
// FIXME: Provide proper encoding! // FIXME: Provide proper encoding!