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Fix formatting and coding style.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234084 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2015-04-04 03:53:25 +00:00
parent 4ed0907298
commit fcd5ea30bc
1 changed files with 12 additions and 15 deletions
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27
include/llvm/Target/TargetSubtargetInfo.h
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@@ -42,15 +42,17 @@ template <typename T> class SmallVectorImpl;
/// be exposed through a TargetSubtargetInfo-derived class. /// be exposed through a TargetSubtargetInfo-derived class.
/// ///
class TargetSubtargetInfo : public MCSubtargetInfo { class TargetSubtargetInfo : public MCSubtargetInfo {
TargetSubtargetInfo(const TargetSubtargetInfo&) = delete; TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
void operator=(const TargetSubtargetInfo&) = delete; void operator=(const TargetSubtargetInfo &) = delete;
protected: // Can only create subclasses... protected: // Can only create subclasses...
TargetSubtargetInfo(); TargetSubtargetInfo();
public: public:
// AntiDepBreakMode - Type of anti-dependence breaking that should // AntiDepBreakMode - Type of anti-dependence breaking that should
// be performed before post-RA scheduling. // be performed before post-RA scheduling.
typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBreakMode; typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBreakMode;
typedef SmallVectorImpl<const TargetRegisterClass*> RegClassVector; typedef SmallVectorImpl<const TargetRegisterClass *> RegClassVector;
virtual ~TargetSubtargetInfo(); virtual ~TargetSubtargetInfo();
@@ -89,8 +91,9 @@ public:
/// MCSchedClassDesc with the isVariant property. This may return the ID of /// MCSchedClassDesc with the isVariant property. This may return the ID of
/// another variant SchedClass, but repeated invocation must quickly terminate /// another variant SchedClass, but repeated invocation must quickly terminate
/// in a nonvariant SchedClass. /// in a nonvariant SchedClass.
virtual unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, virtual unsigned resolveSchedClass(unsigned SchedClass,
const TargetSchedModel* SchedModel) const { const MachineInstr *MI,
const TargetSchedModel *SchedModel) const {
return 0; return 0;
} }
@@ -128,20 +131,16 @@ public:
/// scheduling heuristics (no custom MachineSchedStrategy) to make /// scheduling heuristics (no custom MachineSchedStrategy) to make
/// changes to the generic scheduling policy. /// changes to the generic scheduling policy.
virtual void overrideSchedPolicy(MachineSchedPolicy &Policy, virtual void overrideSchedPolicy(MachineSchedPolicy &Policy,
MachineInstr *begin, MachineInstr *begin, MachineInstr *end,
MachineInstr *end,
unsigned NumRegionInstrs) const {} unsigned NumRegionInstrs) const {}
// \brief Perform target specific adjustments to the latency of a schedule // \brief Perform target specific adjustments to the latency of a schedule
// dependency. // dependency.
virtual void adjustSchedDependency(SUnit *def, SUnit *use, virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep &dep) const {}
SDep& dep) const { }
// For use with PostRAScheduling: get the anti-dependence breaking that should // For use with PostRAScheduling: get the anti-dependence breaking that should
// be performed before post-RA scheduling. // be performed before post-RA scheduling.
virtual AntiDepBreakMode getAntiDepBreakMode() const { virtual AntiDepBreakMode getAntiDepBreakMode() const { return ANTIDEP_NONE; }
return ANTIDEP_NONE;
}
// For use with PostRAScheduling: in CriticalPathRCs, return any register // For use with PostRAScheduling: in CriticalPathRCs, return any register
// classes that should only be considered for anti-dependence breaking if they // classes that should only be considered for anti-dependence breaking if they
@@ -177,9 +176,7 @@ public:
} }
/// Enable tracking of subregister liveness in register allocator. /// Enable tracking of subregister liveness in register allocator.
virtual bool enableSubRegLiveness() const { virtual bool enableSubRegLiveness() const { return false; }
return false;
}
}; };
} // End llvm namespace } // End llvm namespace