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[PowerPC] Convert a README.txt entry into a better test
We now produce the desired code as noted in the README.txt file (no spurious or). Remove the README entry and improve the regression test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225214 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -494,19 +494,6 @@ _bar:
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===-------------------------------------------------------------------------===
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test/CodeGen/PowerPC/2007-03-24-cntlzd.ll compiles to:
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__ZNK4llvm5APInt17countLeadingZerosEv:
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ld r2, 0(r3)
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cntlzd r2, r2
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or r2, r2, r2 <<-- silly.
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addi r3, r2, -64
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blr
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The dead or is a 'truncate' from 64- to 32-bits.
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===-------------------------------------------------------------------------===
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We generate horrible ppc code for this:
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#define N 2000000
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd
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; RUN: llc < %s -march=ppc64 -mcpu=g5 | FileCheck %s
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define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
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%tmp19 = load i64* %t
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@ -7,6 +7,12 @@ define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
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%tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1]
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%tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1]
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ret i32 %tmp90
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; CHECK-LABEL: @_ZNK4llvm5APInt17countLeadingZerosEv
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; CHECK: ld [[REG1:[0-9]+]], 0(3)
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; CHECK-NEXT: cntlzd [[REG2:[0-9]+]], [[REG1]]
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; CHECK-NEXT: addi 3, [[REG2]], -64
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; CHECK-NEXT: blr
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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