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Fix encoding of PC-relative LDRSHW with an immediate offset.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139537 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-09-12 20:36:51 +00:00
parent 26e5285f9f
commit fd92d2e106
2 changed files with 20 additions and 10 deletions
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27
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -713,17 +713,26 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
Imm12 = 0;
isAdd = false ; // 'U' bit is set as part of the fixup.
assert(MO.isExpr() && "Unexpected machine operand type!");
const MCExpr *Expr = MO.getExpr();
if (MO.isExpr()) {
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind;
if (isThumb2())
Kind = MCFixupKind(ARM::fixup_t2_ldst_pcrel_12);
else
Kind = MCFixupKind(ARM::fixup_arm_ldst_pcrel_12);
Fixups.push_back(MCFixup::Create(0, Expr, Kind));
MCFixupKind Kind;
if (isThumb2())
Kind = MCFixupKind(ARM::fixup_t2_ldst_pcrel_12);
else
Kind = MCFixupKind(ARM::fixup_arm_ldst_pcrel_12);
Fixups.push_back(MCFixup::Create(0, Expr, Kind));
++MCNumCPRelocations;
++MCNumCPRelocations;
} else {
Reg = ARM::PC;
int32_t Offset = MO.getImm();
if (Offset < 0) {
Offset *= -1;
isAdd = false;
}
Imm12 = Offset;
}
} else
isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups);

3
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -850,10 +850,11 @@ _func:
@ LDRSH(literal)
@------------------------------------------------------------------------------
ldrsh r5, _bar
ldrsh.w r4, #1435
@ CHECK: ldrsh.w r5, _bar @ encoding: [0xbf'A',0xf9'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@ CHECK: ldrsh.w r4, #1435 @ encoding: [0x3f,0xf9,0x9b,0x45]
@------------------------------------------------------------------------------
@ LDRSHT