From fda60d35c247c239857ebaae8650b06f1154e68e Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Fri, 18 Dec 2009 16:59:39 +0000 Subject: [PATCH] Fix libstdc++ build on ARM linux and part of PR5770. MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done. Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts. For a patch that make us detect problems like this earlier, take a look at http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html With that patch we assert as soon and the new instruction is added to the garbage set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91691 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMISelLowering.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 1b5b73c9997..e969d1e3415 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -3147,6 +3147,9 @@ ARMTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, unsigned ptr = MI->getOperand(1).getReg(); unsigned incr = MI->getOperand(2).getReg(); DebugLoc dl = MI->getDebugLoc(); + + F->DeleteMachineInstr(MI); // The instruction is gone now. + bool isThumb2 = Subtarget->isThumb2(); unsigned ldrOpc, strOpc; switch (Size) {