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fix x86-64 mmx calling convention for real, which passes in integer gprs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37534 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-06-09 05:08:10 +00:00
parent 6b7c21cc30
commit fdbe720416
1 changed files with 9 additions and 3 deletions
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12
lib/Target/X86/X86ISelLowering.cpp
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@ -1183,9 +1183,10 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
RC = X86::FR64RegisterClass;
else {
assert(MVT::isVector(RegVT));
if (MVT::getSizeInBits(RegVT) == 64)
RC = X86::VR64RegisterClass;
else
if (MVT::getSizeInBits(RegVT) == 64) {
RC = X86::GR64RegisterClass; // MMX values are passed in GPRs.
RegVT = MVT::i64;
} else
RC = X86::VR128RegisterClass;
}
@ -1205,6 +1206,11 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
if (VA.getLocInfo() != CCValAssign::Full)
ArgValue = DAG.getNode(ISD::TRUNCATE, VA.getValVT(), ArgValue);
// Handle MMX values passed in GPRs.
if (RegVT != VA.getLocVT() && RC == X86::GR64RegisterClass &&
MVT::getSizeInBits(RegVT) == 64)
ArgValue = DAG.getNode(ISD::BIT_CONVERT, VA.getLocVT(), ArgValue);
ArgValues.push_back(ArgValue);
} else {
assert(VA.isMemLoc());