ARM64: use 32-bit moves for constants where possible.

If we know that a particular 64-bit constant has all high bits zero, then we
can rely on the fact that 32-bit ARM64 instructions automatically zero out the
high bits of an x-register. This gives the expansion logic less constraints to
satisfy and so sometimes allows it to pick better sequences.

Came up while porting test/CodeGen/AArch64/movw-consts.ll: this will allow a
32-bit MOVN to be used in @test8 soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206379 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/ARM64/aapcs.ll

@@ -80,7 +80,7 @@ declare void @variadic(i32 %a, ...)
 define void @test_variadic() {
   call void(i32, ...)* @variadic(i32 0, i64 1, double 2.0)
 ; CHECK: fmov d0, #2.0
-; CHECK: orr x1, xzr, #0x1
+; CHECK: orr w1, wzr, #0x1
 ; CHECK: bl variadic
   ret void
 }