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Use the PC label ID rather than '1'. Add support for thumb-2, because I heard that some people use it.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141042 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2011-10-03 22:44:15 +00:00
parent f8520d564c
commit ff4216a68a
1 changed files with 41 additions and 10 deletions
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51
lib/Target/ARM/ARMISelLowering.cpp
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@ -5505,8 +5505,9 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
BuildMI(DispatchBB, dl, TII->get(ARM::TRAP)); BuildMI(DispatchBB, dl, TII->get(ARM::TRAP));
bool isThumb = Subtarget->isThumb(); bool isThumb = Subtarget->isThumb();
bool isThumb2 = Subtarget->isThumb2();
unsigned PCLabelId = AFI->createPICLabelUId(); unsigned PCLabelId = AFI->createPICLabelUId();
unsigned PCAdj = isThumb ? 4 : 8; unsigned PCAdj = (isThumb || isThumb2) ? 4 : 8;
ARMConstantPoolValue *CPV = ARMConstantPoolValue *CPV =
ARMConstantPoolMBB::Create(F->getContext(), DispatchBB, PCLabelId, PCAdj); ARMConstantPoolMBB::Create(F->getContext(), DispatchBB, PCLabelId, PCAdj);
unsigned CPI = MCP->getConstantPoolIndex(CPV, 4); unsigned CPI = MCP->getConstantPoolIndex(CPV, 4);
@ -5523,18 +5524,48 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
MachineMemOperand::MOStore, 4, 4); MachineMemOperand::MOStore, 4, 4);
// Load the address of the dispatch MBB into the jump buffer. // Load the address of the dispatch MBB into the jump buffer.
if (isThumb) { if (isThumb2) {
unsigned NewVReg = MRI->createVirtualRegister(TRC); unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci_pic), NewVReg) AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1)
.addConstantPoolIndex(CPI) .addConstantPoolIndex(CPI)
.addImm(1) .addMemOperand(CPMMO));
.addMemOperand(CPMMO); unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRspi)) BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2)
.addReg(NewVReg, RegState::Kill) .addReg(NewVReg1, RegState::Kill)
.addImm(PCLabelId);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12))
.addReg(NewVReg2, RegState::Kill)
.addFrameIndex(FI) .addFrameIndex(FI)
.addImm(36) // &jbuf[1] :: pc .addImm(36) // &jbuf[1] :: pc
.addMemOperand(FIMMO)); .addMemOperand(FIMMO));
} else if (isThumb) {
// Incoming value: jbuf
// ldr.n r1, LCPI1_4
// add r1, pc
// add r2, sp, #48 ; &jbuf[1]
// str r1, [r2]
unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1)
.addConstantPoolIndex(CPI)
.addMemOperand(CPMMO));
unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2)
.addReg(NewVReg1)
.addImm(PCLabelId);
unsigned NewVReg3 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tADDrSPi), NewVReg3)
.addFrameIndex(FI)
.addImm(36)); // &jbuf[1] :: pc
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi))
.addReg(NewVReg2, RegState::Kill)
.addReg(NewVReg3, RegState::Kill)
.addImm(0)
.addMemOperand(FIMMO));
} else { } else {
// Incoming value: jbuf
// ldr r1, LCPI1_1
// add r1, pc, r1
// str r1, [$jbuf, #+4] ; &jbuf[1]
unsigned NewVReg1 = MRI->createVirtualRegister(TRC); unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1) AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1)
.addConstantPoolIndex(CPI) .addConstantPoolIndex(CPI)
@ -5543,7 +5574,7 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
unsigned NewVReg2 = MRI->createVirtualRegister(TRC); unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2) AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2)
.addReg(NewVReg1, RegState::Kill) .addReg(NewVReg1, RegState::Kill)
.addImm(1)); .addImm(PCLabelId));
AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12)) AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12))
.addReg(NewVReg2, RegState::Kill) .addReg(NewVReg2, RegState::Kill)
.addFrameIndex(FI) .addFrameIndex(FI)