mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Clean up redundant copies of Triple objects. NFC
Summary: Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10382 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239823 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -121,7 +121,7 @@ private:
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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void AArch64AsmPrinter::EmitEndOfAsmFile(Module &M) {
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void AArch64AsmPrinter::EmitEndOfAsmFile(Module &M) {
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Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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if (TT.isOSBinFormatMachO()) {
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if (TT.isOSBinFormatMachO()) {
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// Funny Darwin hack: This flag tells the linker that no global symbols
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// Funny Darwin hack: This flag tells the linker that no global symbols
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// contain code that falls through to other global symbols (e.g. the obvious
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// contain code that falls through to other global symbols (e.g. the obvious
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@ -2559,7 +2559,7 @@ bool AArch64TargetLowering::isEligibleForTailCallOptimization(
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// cannot rely on the linker replacing the tail call with a return.
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// cannot rely on the linker replacing the tail call with a return.
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
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const GlobalValue *GV = G->getGlobal();
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const GlobalValue *GV = G->getGlobal();
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const Triple TT(getTargetMachine().getTargetTriple());
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const Triple &TT = getTargetMachine().getTargetTriple();
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if (GV->hasExternalWeakLinkage() &&
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if (GV->hasExternalWeakLinkage() &&
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(!TT.isOSWindows() || TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()))
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(!TT.isOSWindows() || TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()))
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return false;
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return false;
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@ -128,9 +128,9 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
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bool LittleEndian)
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bool LittleEndian)
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// This nested ternary is horrible, but DL needs to be properly
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// This nested ternary is horrible, but DL needs to be properly
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// initialized before TLInfo is constructed.
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// initialized before TLInfo is constructed.
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: LLVMTargetMachine(T, computeDataLayout(Triple(TT), LittleEndian), TT, CPU,
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: LLVMTargetMachine(T, computeDataLayout(TT, LittleEndian), TT, CPU, FS,
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FS, Options, RM, CM, OL),
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Options, RM, CM, OL),
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TLOF(createTLOF(Triple(getTargetTriple()))),
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TLOF(createTLOF(getTargetTriple())),
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isLittle(LittleEndian) {
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isLittle(LittleEndian) {
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initAsmInfo();
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initAsmInfo();
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}
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}
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@ -155,8 +155,8 @@ AArch64TargetMachine::getSubtargetImpl(const Function &F) const {
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// creation will depend on the TM and the code generation flags on the
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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resetTargetOptions(F);
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I = llvm::make_unique<AArch64Subtarget>(Triple(TargetTriple), CPU, FS,
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I = llvm::make_unique<AArch64Subtarget>(TargetTriple, CPU, FS, *this,
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*this, isLittle);
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isLittle);
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}
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}
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return I.get();
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return I.get();
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}
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}
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@ -267,7 +267,7 @@ bool AArch64PassConfig::addInstSelector() {
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// For ELF, cleanup any local-dynamic TLS accesses (i.e. combine as many
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// For ELF, cleanup any local-dynamic TLS accesses (i.e. combine as many
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// references to _TLS_MODULE_BASE_ as possible.
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// references to _TLS_MODULE_BASE_ as possible.
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if (Triple(TM->getTargetTriple()).isOSBinFormatELF() &&
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if (TM->getTargetTriple().isOSBinFormatELF() &&
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getOptLevel() != CodeGenOpt::None)
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getOptLevel() != CodeGenOpt::None)
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addPass(createAArch64CleanupLocalDynamicTLSPass());
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addPass(createAArch64CleanupLocalDynamicTLSPass());
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@ -322,6 +322,6 @@ void AArch64PassConfig::addPreEmitPass() {
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// range of their destination.
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// range of their destination.
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addPass(createAArch64BranchRelaxation());
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addPass(createAArch64BranchRelaxation());
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if (TM->getOptLevel() != CodeGenOpt::None && EnableCollectLOH &&
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if (TM->getOptLevel() != CodeGenOpt::None && EnableCollectLOH &&
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Triple(TM->getTargetTriple()).isOSBinFormatMachO())
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TM->getTargetTriple().isOSBinFormatMachO())
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addPass(createAArch64CollectLOHPass());
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addPass(createAArch64CollectLOHPass());
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}
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}
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@ -208,7 +208,7 @@ MCELFStreamer *createAArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB,
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MCTargetStreamer *
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MCTargetStreamer *
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createAArch64ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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createAArch64ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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Triple TT(STI.getTargetTriple());
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const Triple &TT = STI.getTargetTriple();
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if (TT.getObjectFormat() == Triple::ELF)
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if (TT.getObjectFormat() == Triple::ELF)
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return new AArch64TargetELFStreamer(S);
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return new AArch64TargetELFStreamer(S);
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return nullptr;
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return nullptr;
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@ -429,7 +429,7 @@ void ARMAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
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}
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}
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void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
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void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
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Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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// Use unified assembler syntax.
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// Use unified assembler syntax.
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OutStreamer->EmitAssemblerFlag(MCAF_SyntaxUnified);
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OutStreamer->EmitAssemblerFlag(MCAF_SyntaxUnified);
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@ -473,7 +473,7 @@ emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
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void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
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void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
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Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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if (TT.isOSBinFormatMachO()) {
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if (TT.isOSBinFormatMachO()) {
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// All darwin targets use mach-o.
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// All darwin targets use mach-o.
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const TargetLoweringObjectFileMachO &TLOFMacho =
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const TargetLoweringObjectFileMachO &TLOFMacho =
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@ -564,7 +564,7 @@ void ARMAsmPrinter::emitAttributes() {
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// anyhow.
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// anyhow.
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// FIXME: For ifunc related functions we could iterate over and look
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// FIXME: For ifunc related functions we could iterate over and look
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// for a feature string that doesn't match the default one.
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// for a feature string that doesn't match the default one.
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const Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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StringRef CPU = TM.getTargetCPU();
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StringRef CPU = TM.getTargetCPU();
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StringRef FS = TM.getTargetFeatureString();
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StringRef FS = TM.getTargetFeatureString();
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std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPU);
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std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPU);
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@ -105,7 +105,7 @@ private:
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public:
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public:
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unsigned getISAEncoding() override {
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unsigned getISAEncoding() override {
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// ARM/Darwin adds ISA to the DWARF info for each function.
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// ARM/Darwin adds ISA to the DWARF info for each function.
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Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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if (!TT.isOSBinFormatMachO())
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if (!TT.isOSBinFormatMachO())
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return 0;
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return 0;
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bool isThumb = TT.getArch() == Triple::thumb ||
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bool isThumb = TT.getArch() == Triple::thumb ||
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@ -2043,7 +2043,7 @@ ARMTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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// cannot rely on the linker replacing the tail call with a return.
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// cannot rely on the linker replacing the tail call with a return.
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
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const GlobalValue *GV = G->getGlobal();
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const GlobalValue *GV = G->getGlobal();
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const Triple TT(getTargetMachine().getTargetTriple());
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const Triple &TT = getTargetMachine().getTargetTriple();
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if (GV->hasExternalWeakLinkage() &&
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if (GV->hasExternalWeakLinkage() &&
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(!TT.isOSWindows() || TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()))
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(!TT.isOSWindows() || TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()))
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return false;
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return false;
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@ -178,7 +178,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
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: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
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: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
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CPU, FS, Options, RM, CM, OL),
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CPU, FS, Options, RM, CM, OL),
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TargetABI(computeTargetABI(TT, CPU, Options)),
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TargetABI(computeTargetABI(TT, CPU, Options)),
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TLOF(createTLOF(Triple(getTargetTriple()))),
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TLOF(createTLOF(getTargetTriple())),
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Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
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Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
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// Default to triple-appropriate float ABI
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// Default to triple-appropriate float ABI
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@ -220,8 +220,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
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// creation will depend on the TM and the code generation flags on the
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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resetTargetOptions(F);
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I = llvm::make_unique<ARMSubtarget>(Triple(TargetTriple), CPU, FS, *this,
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I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle);
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isLittle);
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}
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}
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return I.get();
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return I.get();
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}
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}
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@ -355,8 +354,7 @@ bool ARMPassConfig::addPreISel() {
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bool ARMPassConfig::addInstSelector() {
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bool ARMPassConfig::addInstSelector() {
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addPass(createARMISelDag(getARMTargetMachine(), getOptLevel()));
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addPass(createARMISelDag(getARMTargetMachine(), getOptLevel()));
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if (Triple(TM->getTargetTriple()).isOSBinFormatELF() &&
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if (TM->getTargetTriple().isOSBinFormatELF() && TM->Options.EnableFastISel)
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TM->Options.EnableFastISel)
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addPass(createARMGlobalBaseRegPass());
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addPass(createARMGlobalBaseRegPass());
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return false;
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return false;
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}
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}
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@ -1324,7 +1324,7 @@ MCTargetStreamer *createARMNullTargetStreamer(MCStreamer &S) {
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MCTargetStreamer *createARMObjectTargetStreamer(MCStreamer &S,
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MCTargetStreamer *createARMObjectTargetStreamer(MCStreamer &S,
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const MCSubtargetInfo &STI) {
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const MCSubtargetInfo &STI) {
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Triple TT(STI.getTargetTriple());
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const Triple &TT = STI.getTargetTriple();
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if (TT.getObjectFormat() == Triple::ELF)
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if (TT.getObjectFormat() == Triple::ELF)
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return new ARMTargetELFStreamer(S);
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return new ARMTargetELFStreamer(S);
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return new ARMTargetStreamer(S);
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return new ARMTargetStreamer(S);
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@ -57,7 +57,7 @@ public:
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return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2];
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return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2];
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}
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}
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bool isTargetMachO(const MCSubtargetInfo &STI) const {
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bool isTargetMachO(const MCSubtargetInfo &STI) const {
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Triple TT(STI.getTargetTriple());
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const Triple &TT = STI.getTargetTriple();
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return TT.isOSBinFormatMachO();
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return TT.isOSBinFormatMachO();
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}
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}
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@ -41,10 +41,10 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT,
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const TargetOptions &Options,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL)
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CodeGenOpt::Level OL)
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: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS,
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: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
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Options, RM, CM, OL),
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OL),
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TLOF(make_unique<TargetLoweringObjectFileELF>()),
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TLOF(make_unique<TargetLoweringObjectFileELF>()),
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Subtarget(Triple(TT), CPU, FS, *this) {
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Subtarget(TT, CPU, FS, *this) {
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initAsmInfo();
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initAsmInfo();
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}
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}
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namespace {
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namespace {
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@ -47,7 +47,7 @@ unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
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llvm_unreachable("Unhandled ABI");
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llvm_unreachable("Unhandled ABI");
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}
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}
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MipsABIInfo MipsABIInfo::computeTargetABI(Triple TT, StringRef CPU,
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MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
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const MCTargetOptions &Options) {
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const MCTargetOptions &Options) {
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if (Options.getABIName().startswith("o32"))
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if (Options.getABIName().startswith("o32"))
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return MipsABIInfo::O32();
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return MipsABIInfo::O32();
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@ -36,7 +36,7 @@ public:
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static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
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static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
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static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
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static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
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static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
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static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
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static MipsABIInfo computeTargetABI(Triple TT, StringRef CPU,
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static MipsABIInfo computeTargetABI(const Triple &TT, StringRef CPU,
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const MCTargetOptions &Options);
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const MCTargetOptions &Options);
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bool IsKnown() const { return ThisABI != ABI::Unknown; }
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bool IsKnown() const { return ThisABI != ABI::Unknown; }
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@ -694,7 +694,7 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
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// clean anyhow.
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// clean anyhow.
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// FIXME: For ifunc related functions we could iterate over and look
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// FIXME: For ifunc related functions we could iterate over and look
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// for a feature string that doesn't match the default one.
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// for a feature string that doesn't match the default one.
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const Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
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StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
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StringRef FS = TM.getTargetFeatureString();
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StringRef FS = TM.getTargetFeatureString();
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const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
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const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
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@ -141,8 +141,7 @@ CodeGenOpt::Level MipsSubtarget::getOptLevelToEnablePostRAScheduler() const {
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MipsSubtarget &
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MipsSubtarget &
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MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
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MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
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const TargetMachine &TM) {
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const TargetMachine &TM) {
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std::string CPUName =
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std::string CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU);
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MIPS_MC::selectMipsCPU(Triple(TM.getTargetTriple()), CPU);
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// Parse features string.
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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ParseSubtargetFeatures(CPUName, FS);
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@ -156,8 +156,8 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const {
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// creation will depend on the TM and the code generation flags on the
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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resetTargetOptions(F);
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I = llvm::make_unique<MipsSubtarget>(Triple(TargetTriple), CPU, FS,
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I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle,
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isLittle, *this);
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*this);
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}
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}
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return I.get();
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return I.get();
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}
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}
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@ -808,7 +808,7 @@ bool NVPTXAsmPrinter::doInitialization(Module &M) {
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// Construct a default subtarget off of the TargetMachine defaults. The
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// Construct a default subtarget off of the TargetMachine defaults. The
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// rest of NVPTX isn't friendly to change subtargets per function and
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// rest of NVPTX isn't friendly to change subtargets per function and
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// so the default TargetMachine will have all of the options.
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// so the default TargetMachine will have all of the options.
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const Triple TT(TM.getTargetTriple());
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const Triple &TT = TM.getTargetTriple();
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StringRef CPU = TM.getTargetCPU();
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StringRef CPU = TM.getTargetCPU();
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StringRef FS = TM.getTargetFeatureString();
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StringRef FS = TM.getTargetFeatureString();
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const NVPTXTargetMachine &NTM = static_cast<const NVPTXTargetMachine &>(TM);
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const NVPTXTargetMachine &NTM = static_cast<const NVPTXTargetMachine &>(TM);
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@ -846,7 +846,7 @@ bool NVPTXAsmPrinter::doInitialization(Module &M) {
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}
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}
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// If we're not NVCL we're CUDA, go ahead and emit filenames.
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// If we're not NVCL we're CUDA, go ahead and emit filenames.
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if (Triple(TM.getTargetTriple()).getOS() != Triple::NVCL)
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if (TM.getTargetTriple().getOS() != Triple::NVCL)
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recordAndEmitFilenames(M);
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recordAndEmitFilenames(M);
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GlobalsEmitted = false;
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GlobalsEmitted = false;
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@ -309,7 +309,7 @@ unsigned PPCMCCodeEmitter::getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
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// Return the thread-pointer register's encoding.
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// Return the thread-pointer register's encoding.
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Fixups.push_back(MCFixup::create(0, MO.getExpr(),
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Fixups.push_back(MCFixup::create(0, MO.getExpr(),
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(MCFixupKind)PPC::fixup_ppc_nofixup));
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(MCFixupKind)PPC::fixup_ppc_nofixup));
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Triple TT(STI.getTargetTriple());
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const Triple &TT = STI.getTargetTriple();
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bool isPPC64 = TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le;
|
bool isPPC64 = TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le;
|
||||||
return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
|
return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
|
||||||
}
|
}
|
||||||
|
@ -230,7 +230,7 @@ static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
|
|||||||
|
|
||||||
static MCTargetStreamer *
|
static MCTargetStreamer *
|
||||||
createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
|
createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
|
||||||
Triple TT(STI.getTargetTriple());
|
const Triple &TT = STI.getTargetTriple();
|
||||||
if (TT.getObjectFormat() == Triple::ELF)
|
if (TT.getObjectFormat() == Triple::ELF)
|
||||||
return new PPCTargetELFStreamer(S);
|
return new PPCTargetELFStreamer(S);
|
||||||
return new PPCTargetMachOStreamer(S);
|
return new PPCTargetMachOStreamer(S);
|
||||||
|
@ -440,7 +440,7 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
|
|||||||
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
||||||
MCInst TmpInst;
|
MCInst TmpInst;
|
||||||
bool isPPC64 = Subtarget->isPPC64();
|
bool isPPC64 = Subtarget->isPPC64();
|
||||||
bool isDarwin = Triple(TM.getTargetTriple()).isOSDarwin();
|
bool isDarwin = TM.getTargetTriple().isOSDarwin();
|
||||||
const Module *M = MF->getFunction()->getParent();
|
const Module *M = MF->getFunction()->getParent();
|
||||||
PICLevel::Level PL = M->getPICLevel();
|
PICLevel::Level PL = M->getPICLevel();
|
||||||
|
|
||||||
@ -1511,7 +1511,7 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
|
|||||||
static AsmPrinter *
|
static AsmPrinter *
|
||||||
createPPCAsmPrinterPass(TargetMachine &tm,
|
createPPCAsmPrinterPass(TargetMachine &tm,
|
||||||
std::unique_ptr<MCStreamer> &&Streamer) {
|
std::unique_ptr<MCStreamer> &&Streamer) {
|
||||||
if (Triple(tm.getTargetTriple()).isMacOSX())
|
if (tm.getTargetTriple().isMacOSX())
|
||||||
return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
|
return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
|
||||||
return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
|
return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
|
||||||
}
|
}
|
||||||
|
@ -417,8 +417,8 @@ bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
|
|||||||
bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
|
bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
|
||||||
bool MadeChange = false;
|
bool MadeChange = false;
|
||||||
|
|
||||||
Triple TT = Triple(L->getHeader()->getParent()->getParent()->
|
const Triple TT =
|
||||||
getTargetTriple());
|
Triple(L->getHeader()->getParent()->getParent()->getTargetTriple());
|
||||||
if (!TT.isArch32Bit() && !TT.isArch64Bit())
|
if (!TT.isArch32Bit() && !TT.isArch64Bit())
|
||||||
return MadeChange; // Unknown arch. type.
|
return MadeChange; // Unknown arch. type.
|
||||||
|
|
||||||
|
@ -40,7 +40,7 @@ static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP){
|
|||||||
Mangler *Mang = AP.Mang;
|
Mangler *Mang = AP.Mang;
|
||||||
const DataLayout *DL = TM.getDataLayout();
|
const DataLayout *DL = TM.getDataLayout();
|
||||||
MCContext &Ctx = AP.OutContext;
|
MCContext &Ctx = AP.OutContext;
|
||||||
bool isDarwin = Triple(TM.getTargetTriple()).isOSDarwin();
|
bool isDarwin = TM.getTargetTriple().isOSDarwin();
|
||||||
|
|
||||||
SmallString<128> Name;
|
SmallString<128> Name;
|
||||||
StringRef Suffix;
|
StringRef Suffix;
|
||||||
|
@ -171,7 +171,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
|
|||||||
CodeGenOpt::Level OL)
|
CodeGenOpt::Level OL)
|
||||||
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
|
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
|
||||||
computeFSAdditions(FS, OL, TT), Options, RM, CM, OL),
|
computeFSAdditions(FS, OL, TT), Options, RM, CM, OL),
|
||||||
TLOF(createTLOF(Triple(getTargetTriple()))),
|
TLOF(createTLOF(getTargetTriple())),
|
||||||
TargetABI(computeTargetABI(TT, Options)) {
|
TargetABI(computeTargetABI(TT, Options)) {
|
||||||
initAsmInfo();
|
initAsmInfo();
|
||||||
}
|
}
|
||||||
@ -215,7 +215,7 @@ PPCTargetMachine::getSubtargetImpl(const Function &F) const {
|
|||||||
// function that reside in TargetOptions.
|
// function that reside in TargetOptions.
|
||||||
resetTargetOptions(F);
|
resetTargetOptions(F);
|
||||||
I = llvm::make_unique<PPCSubtarget>(
|
I = llvm::make_unique<PPCSubtarget>(
|
||||||
Triple(TargetTriple), CPU,
|
TargetTriple, CPU,
|
||||||
// FIXME: It would be good to have the subtarget additions here
|
// FIXME: It would be good to have the subtarget additions here
|
||||||
// not necessary. Anything that turns them on/off (overrides) ends
|
// not necessary. Anything that turns them on/off (overrides) ends
|
||||||
// up being put at the end of the feature string, but the defaults
|
// up being put at the end of the feature string, but the defaults
|
||||||
@ -262,8 +262,7 @@ void PPCPassConfig::addIRPasses() {
|
|||||||
|
|
||||||
// For the BG/Q (or if explicitly requested), add explicit data prefetch
|
// For the BG/Q (or if explicitly requested), add explicit data prefetch
|
||||||
// intrinsics.
|
// intrinsics.
|
||||||
bool UsePrefetching =
|
bool UsePrefetching = TM->getTargetTriple().getVendor() == Triple::BGQ &&
|
||||||
Triple(TM->getTargetTriple()).getVendor() == Triple::BGQ &&
|
|
||||||
getOptLevel() != CodeGenOpt::None;
|
getOptLevel() != CodeGenOpt::None;
|
||||||
if (EnablePrefetch.getNumOccurrences() > 0)
|
if (EnablePrefetch.getNumOccurrences() > 0)
|
||||||
UsePrefetching = EnablePrefetch;
|
UsePrefetching = EnablePrefetch;
|
||||||
@ -318,7 +317,7 @@ void PPCPassConfig::addMachineSSAOptimization() {
|
|||||||
TargetPassConfig::addMachineSSAOptimization();
|
TargetPassConfig::addMachineSSAOptimization();
|
||||||
// For little endian, remove where possible the vector swap instructions
|
// For little endian, remove where possible the vector swap instructions
|
||||||
// introduced at code generation to normalize vector element order.
|
// introduced at code generation to normalize vector element order.
|
||||||
if (Triple(TM->getTargetTriple()).getArch() == Triple::ppc64le &&
|
if (TM->getTargetTriple().getArch() == Triple::ppc64le &&
|
||||||
!DisableVSXSwapRemoval)
|
!DisableVSXSwapRemoval)
|
||||||
addPass(createPPCVSXSwapRemovalPass());
|
addPass(createPPCVSXSwapRemovalPass());
|
||||||
}
|
}
|
||||||
|
@ -50,7 +50,7 @@ public:
|
|||||||
}
|
}
|
||||||
bool isELFv2ABI() const { return TargetABI == PPC_ABI_ELFv2; }
|
bool isELFv2ABI() const { return TargetABI == PPC_ABI_ELFv2; }
|
||||||
bool isPPC64() const {
|
bool isPPC64() const {
|
||||||
Triple TT(getTargetTriple());
|
const Triple &TT = getTargetTriple();
|
||||||
return (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le);
|
return (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le);
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -44,7 +44,7 @@ void TargetLoweringObjectFile::Initialize(MCContext &ctx,
|
|||||||
const TargetMachine &TM) {
|
const TargetMachine &TM) {
|
||||||
Ctx = &ctx;
|
Ctx = &ctx;
|
||||||
DL = TM.getDataLayout();
|
DL = TM.getDataLayout();
|
||||||
InitMCObjectFileInfo(Triple(TM.getTargetTriple()), TM.getRelocationModel(),
|
InitMCObjectFileInfo(TM.getTargetTriple(), TM.getRelocationModel(),
|
||||||
TM.getCodeModel(), *Ctx);
|
TM.getCodeModel(), *Ctx);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -54,7 +54,7 @@ std::string X86_MC::ParseX86Triple(const Triple &TT) {
|
|||||||
return FS;
|
return FS;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned X86_MC::getDwarfRegFlavour(Triple TT, bool isEH) {
|
unsigned X86_MC::getDwarfRegFlavour(const Triple &TT, bool isEH) {
|
||||||
if (TT.getArch() == Triple::x86_64)
|
if (TT.getArch() == Triple::x86_64)
|
||||||
return DWARFFlavour::X86_64;
|
return DWARFFlavour::X86_64;
|
||||||
|
|
||||||
|
@ -54,7 +54,7 @@ namespace N86 {
|
|||||||
namespace X86_MC {
|
namespace X86_MC {
|
||||||
std::string ParseX86Triple(const Triple &TT);
|
std::string ParseX86Triple(const Triple &TT);
|
||||||
|
|
||||||
unsigned getDwarfRegFlavour(Triple TT, bool isEH);
|
unsigned getDwarfRegFlavour(const Triple &TT, bool isEH);
|
||||||
|
|
||||||
void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI);
|
void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI);
|
||||||
|
|
||||||
|
@ -511,7 +511,7 @@ bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
|||||||
}
|
}
|
||||||
|
|
||||||
void X86AsmPrinter::EmitStartOfAsmFile(Module &M) {
|
void X86AsmPrinter::EmitStartOfAsmFile(Module &M) {
|
||||||
Triple TT(TM.getTargetTriple());
|
const Triple &TT = TM.getTargetTriple();
|
||||||
|
|
||||||
if (TT.isOSBinFormatMachO())
|
if (TT.isOSBinFormatMachO())
|
||||||
OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
|
OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
|
||||||
@ -585,7 +585,7 @@ void X86AsmPrinter::GenerateExportDirective(const MCSymbol *Sym, bool IsData) {
|
|||||||
SmallString<128> Directive;
|
SmallString<128> Directive;
|
||||||
raw_svector_ostream OS(Directive);
|
raw_svector_ostream OS(Directive);
|
||||||
StringRef Name = Sym->getName();
|
StringRef Name = Sym->getName();
|
||||||
Triple TT(TM.getTargetTriple());
|
const Triple &TT = TM.getTargetTriple();
|
||||||
|
|
||||||
if (TT.isKnownWindowsMSVCEnvironment())
|
if (TT.isKnownWindowsMSVCEnvironment())
|
||||||
OS << " /EXPORT:";
|
OS << " /EXPORT:";
|
||||||
@ -610,7 +610,7 @@ void X86AsmPrinter::GenerateExportDirective(const MCSymbol *Sym, bool IsData) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
|
void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
|
||||||
Triple TT(TM.getTargetTriple());
|
const Triple &TT = TM.getTargetTriple();
|
||||||
|
|
||||||
if (TT.isOSBinFormatMachO()) {
|
if (TT.isOSBinFormatMachO()) {
|
||||||
// All darwin targets use mach-o.
|
// All darwin targets use mach-o.
|
||||||
|
@ -101,7 +101,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT,
|
|||||||
CodeGenOpt::Level OL)
|
CodeGenOpt::Level OL)
|
||||||
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
|
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
|
||||||
OL),
|
OL),
|
||||||
TLOF(createTLOF(Triple(getTargetTriple()))),
|
TLOF(createTLOF(getTargetTriple())),
|
||||||
Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
|
Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
|
||||||
// Windows stack unwinder gets confused when execution flow "falls through"
|
// Windows stack unwinder gets confused when execution flow "falls through"
|
||||||
// after a call to 'noreturn' function.
|
// after a call to 'noreturn' function.
|
||||||
@ -153,7 +153,7 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
|
|||||||
// creation will depend on the TM and the code generation flags on the
|
// creation will depend on the TM and the code generation flags on the
|
||||||
// function that reside in TargetOptions.
|
// function that reside in TargetOptions.
|
||||||
resetTargetOptions(F);
|
resetTargetOptions(F);
|
||||||
I = llvm::make_unique<X86Subtarget>(Triple(TargetTriple), CPU, FS, *this,
|
I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
|
||||||
Options.StackAlignmentOverride);
|
Options.StackAlignmentOverride);
|
||||||
}
|
}
|
||||||
return I.get();
|
return I.get();
|
||||||
@ -218,7 +218,7 @@ bool X86PassConfig::addInstSelector() {
|
|||||||
addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
|
addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
|
||||||
|
|
||||||
// For ELF, cleanup any local-dynamic TLS accesses.
|
// For ELF, cleanup any local-dynamic TLS accesses.
|
||||||
if (Triple(TM->getTargetTriple()).isOSBinFormatELF() &&
|
if (TM->getTargetTriple().isOSBinFormatELF() &&
|
||||||
getOptLevel() != CodeGenOpt::None)
|
getOptLevel() != CodeGenOpt::None)
|
||||||
addPass(createCleanupLocalDynamicTLSPass());
|
addPass(createCleanupLocalDynamicTLSPass());
|
||||||
|
|
||||||
@ -236,7 +236,7 @@ bool X86PassConfig::addILPOpts() {
|
|||||||
|
|
||||||
bool X86PassConfig::addPreISel() {
|
bool X86PassConfig::addPreISel() {
|
||||||
// Only add this pass for 32-bit x86 Windows.
|
// Only add this pass for 32-bit x86 Windows.
|
||||||
Triple TT(TM->getTargetTriple());
|
const Triple &TT = TM->getTargetTriple();
|
||||||
if (TT.isOSWindows() && TT.getArch() == Triple::x86)
|
if (TT.isOSWindows() && TT.getArch() == Triple::x86)
|
||||||
addPass(createX86WinEHStatePass());
|
addPass(createX86WinEHStatePass());
|
||||||
return true;
|
return true;
|
||||||
|
Loading…
x
Reference in New Issue
Block a user