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Convert VLD1 and VLD2 instructions to use pseudo-instructions until

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after regalloc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112825 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2010-09-02 16:00:54 +00:00
parent 743547f07b
commit ffde080ae6
5 changed files with 212 additions and 54 deletions
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2
test/CodeGen/ARM/reg_sequence.ll
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@ -45,10 +45,10 @@ define void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr,
entry:
; CHECK: t2:
; CHECK: vld1.16
; CHECK: vmul.i16
; CHECK-NOT: vmov
; CHECK: vld1.16
; CHECK: vmul.i16
; CHECK: vmul.i16
; CHECK-NOT: vmov
; CHECK: vst1.16
; CHECK: vst1.16