7e2c793a2b
Fix a typo 'iff' => 'if'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 09:59:43 +00:00
8f50647662
[arm-fast-isel] Add support for ELF PIC.
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This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 05:21:41 +00:00
e5e674ba11
[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
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non-aligned i32 loads/stores.
rdar://12304911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 16:58:35 +00:00
d70c98e884
[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
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non-halfword-aligned i16 loads/stores.
rdar://12304911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:41:42 +00:00
e757640df0
Fix a few old-GCC warnings. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 11:13:55 +00:00
c4dc2490c4
[arm-fast-isel] Add support for ARM PIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162823 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29 02:41:21 +00:00
0745b649ed
Fix call instruction operands in ARMFastISel.
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The ARM BL and BLX instructions don't have predicate operands, but the
thumb variants tBL and tBLX do.
The argument registers should be added as implicit uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24 20:52:46 +00:00
35fc62bf70
Remove virtual from many methods. These methods replace methods in the base class, but the base class methods aren't virtual so it just increased call overhead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 21:38:45 +00:00
2ff4e9d5af
[arm-fast-isel] Add support for fastcc.
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Without fastcc support, the caller just falls through to CallingConv::C
for fastcc, but callee still uses fastcc, this inconsistency of calling
convention is a problem, and fastcc support can fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 05:15:53 +00:00
d49edb7ab0
Fall back to selection DAG isel for calls to builtin functions.
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Fast isel doesn't currently have support for translating builtin function
calls to target instructions. For embedded environments where the library
functions are not available, this is a matter of correctness and not
just optimization. Most of this patch is just arranging to make the
TargetLibraryInfo available in fast isel. <rdar://problem/12008746>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 04:06:28 +00:00
2946549a28
[arm-fast-isel] Add support for shl, lshr, and ashr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 02:37:48 +00:00
e94ac8871a
Add support for the ARM GHC calling convention, this patch was in 3.0,
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but somehow managed to be dropped later.
Patch by Karel Gardas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 00:05:53 +00:00
ee649839a2
[arm-fast-isel] Add support for vararg function calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160500 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-19 09:49:00 +00:00
bd985efa99
Revert r159804, "[arm-fast-isel] Add support for vararg function calls."
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It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-06 11:12:44 +00:00
a8c4d739f2
[arm-fast-isel] Add support for vararg function calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-06 03:02:37 +00:00
efc967e044
Cleanup whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 06:08:19 +00:00
49d6fc02ef
[arm-fast-isel] Add support for -arm-long-calls.
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Patch by Jush Lu <jush.msn@gmail.com >.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-12 19:25:13 +00:00
ad5c880892
Re-enable the CMN instruction.
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We turned off the CMN instruction because it had semantics which we weren't
getting correct. If we are comparing with an immediate, then it's okay to use
the CMN instruction.
<rdar://problem/7569620>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11 08:07:26 +00:00
bbff4ee92d
[arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0
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then DestReg is undefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 21:12:31 +00:00
ada759d5fa
[arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.
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Patch by Jush Lu <jush.msn@gmail.com >.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 17:23:22 +00:00
1c8fccbc12
[arm-fast-isel] Add support for non-global callee.
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Patch by Jush Lu <jush.msn@gmail.com >.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 18:38:57 +00:00
226ddf5278
[fast-isel] Add support for selecting @llvm.trap().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 21:33:49 +00:00
2b3b335f2d
[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Minor cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 19:40:25 +00:00
2a2e9d54e9
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
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retval. Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 18:51:55 +00:00
2f6ae41f14
[fast-isel] Rather then assert (or segfault in a non-asserts build), fall back
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to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 17:41:06 +00:00
f4bd21c256
The return type is an unsigned, not a bool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156621 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 16:41:38 +00:00
420761a0f1
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 07:30:17 +00:00
d4f020a3af
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-06 23:43:50 +00:00
f16936e592
Deduplicate ARM call-related instructions.
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We had special instructions for iOS because r9 is call-clobbered, but
that is represented dynamically by the register mask operands now, so
there is no need for the pseudo-instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154144 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-06 00:04:58 +00:00
c89c744b69
Remove unnecessary llvm:: qualifications
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153500 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27 07:21:54 +00:00
0e5233a9e5
Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-26 00:45:15 +00:00
5aeff3171c
Check if we can handle the arguments of a call (and therefore the call) in
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fast-isel before emitting code. If the program bails after code was emitted,
then it could lead to the stack being adjusted more than once (two
CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This
leads to general badness and gnashing of teeth.
<rdar://problem/11050630>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 23:11:07 +00:00
0ac754f6f4
[fast-isel] Address Eli's comments for r152847. Specifically, add a test case
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and still allow immediate encoding, just not with cmn.
rdar://11038907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152869 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 22:54:20 +00:00
530b19b702
[fast-isel] Don't try to encode LONG_MIN using cmn instructions.
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rdar://11038907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152847 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 21:40:23 +00:00
44c98b7114
[fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point
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condition flags to CPSR. This allows us to simplify SelectCmp.
Patch by Zonr Chang <zonr.xchg@gmail.com >.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 20:59:26 +00:00
4f92b5e616
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
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The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06 00:19:55 +00:00
e751c0069a
ARM use the right opcode for FP<->Integer move in fast-isel.
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rdar://10965031
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151850 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01 22:47:09 +00:00
c54f634886
Switch ARM target to register masks.
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I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.
This patch does cause some assembly changes. Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected. MachineCopyPropagation may sometimes
leave a dead copy behind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24 01:19:29 +00:00
44d23825d6
Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22 05:59:10 +00:00
b8703fe265
[fast-isel] Add support for returning non-legal types with no sign- or zero-
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entend flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 01:21:28 +00:00
a69feb0f33
Remove unnecessary assignment to temporary, ResultReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-16 22:45:33 +00:00
40d552e0be
Add braces to if clause to make symmetric with associate else clause.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150591 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 17:36:21 +00:00
92fd017364
Use a temporary variable, rather then a series of redundant calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 00:23:55 +00:00
5793a6586d
Remove unnecessary assignment to temporary, ResultReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150520 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-14 22:29:48 +00:00
743e19983e
[fast-isel] Add support for SUBs with non-legal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150047 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 02:45:44 +00:00
6fde875621
[fast-isel] Add support for ORs with non-legal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150045 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 02:29:21 +00:00
60c8fa6bb9
[fast-isel] Add support for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 23:56:08 +00:00
bc2198133a
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 02:50:20 +00:00
3901c3e750
[fast-isel] Add support for ADDs with non-legal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06 23:50:07 +00:00
5b8a1db7ea
Persuade GCC that there is nothing worth warning about here (there isn't).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149834 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 14:20:11 +00:00
