80566 Commits

Author SHA1 Message Date
7ffec838a2 Protection against stack-based memory corruption errors using SafeStack
This patch adds the safe stack instrumentation pass to LLVM, which separates
the program stack into a safe stack, which stores return addresses, register
spills, and local variables that are statically verified to be accessed
in a safe way, and the unsafe stack, which stores everything else. Such
separation makes it much harder for an attacker to corrupt objects on the
safe stack, including function pointers stored in spilled registers and
return addresses. You can find more information about the safe stack, as
well as other parts of or control-flow hijack protection technique in our
OSDI paper on code-pointer integrity (http://dslab.epfl.ch/pubs/cpi.pdf)
and our project website (http://levee.epfl.ch).

The overhead of our implementation of the safe stack is very close to zero
(0.01% on the Phoronix benchmarks). This is lower than the overhead of
stack cookies, which are supported by LLVM and are commonly used today,
yet the security guarantees of the safe stack are strictly stronger than
stack cookies. In some cases, the safe stack improves performance due to
better cache locality.

Our current implementation of the safe stack is stable and robust, we
used it to recompile multiple projects on Linux including Chromium, and
we also recompiled the entire FreeBSD user-space system and more than 100
packages. We ran unit tests on the FreeBSD system and many of the packages
and observed no errors caused by the safe stack. The safe stack is also fully
binary compatible with non-instrumented code and can be applied to parts of
a program selectively.

This patch is our implementation of the safe stack on top of LLVM. The
patches make the following changes:

- Add the safestack function attribute, similar to the ssp, sspstrong and
  sspreq attributes.

- Add the SafeStack instrumentation pass that applies the safe stack to all
  functions that have the safestack attribute. This pass moves all unsafe local
  variables to the unsafe stack with a separate stack pointer, whereas all
  safe variables remain on the regular stack that is managed by LLVM as usual.

- Invoke the pass as the last stage before code generation (at the same time
  the existing cookie-based stack protector pass is invoked).

- Add unit tests for the safe stack.

Original patch by Volodymyr Kuznetsov and others at the Dependable Systems
Lab at EPFL; updates and upstreaming by myself.

Differential Revision: http://reviews.llvm.org/D6094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 21:07:11 +00:00
3aef7761ac Don't indent inside a namespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 21:04:27 +00:00
132c3549d9 Replace @ with the more common \. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 21:02:49 +00:00
9e26836221 Don't repeat names in comments and start functions with a lower case letter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239756 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:55:37 +00:00
a15d888abf MIR Serialization: Connect the machine function analysis pass to the MIR parser.
This commit connects the machine function analysis pass (which creates machine
functions) to the MIR parser, which will initialize the machine functions 
with the state from the MIR file and reconstruct the machine IR.

This commit introduces a new interface called 'MachineFunctionInitializer',
which can be used to provide custom initialization for the machine functions.

This commit also introduces a new diagnostic class called 
'DiagnosticInfoMIRParser' which is used for MIR parsing errors.
This commit modifies the default diagnostic handling in LLVMContext - now the
the diagnostics are printed directly into llvm::errs() so that the MIR parsing 
errors can be printed with colours.  

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9928


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:30:22 +00:00
e99f30c57b Remove duplicate conditional in if-stmt.
Fixes PR23839.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:16:53 +00:00
1456b12847 Cleanup the constructor of BitcodeReader. NFC.
Use the same argument names as the members.
Use default member initializes.

Extracted from a patch by Karl Schimpf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239749 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:08:17 +00:00
18a05df213 Unbreak the build from r239740.
Do not re-use an enum name as a field name.  Some bots don't like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 19:29:44 +00:00
cf9ca4fd5d [Hexagon] Moving pass declarations out of header and in to implementation files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 19:05:35 +00:00
8d5b28507b [CodeGen] Add a pass to fold null checks into nearby memory operations.
Summary:
This change adds an "ImplicitNullChecks" target dependent pass.  This
pass folds null checks into memory operation using the FAULTING_LOAD
pseudo-op introduced in previous patches.

Depends on D10197
Depends on D10199
Depends on D10200

Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick

Reviewed By: atrick

Subscribers: ab, JosephTremoulet, llvm-commits

Differential Revision: http://reviews.llvm.org/D10201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239743 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:27 +00:00
a1e554d253 [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate.
Summary:
NFC: no one uses AnalyzeBranchPredicate yet.

Add TargetInstrInfo::AnalyzeBranchPredicate and implement for x86.  A
later change adding support for page-fault based implicit null checks
depends on this.

Reviewers: reames, ab, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239742 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:21 +00:00
319c91bbb0 [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86.
Summary:

TargetInstrInfo::getLdStBaseRegImmOfs to
TargetInstrInfo::getMemOpBaseRegImmOfs and implement for x86.  The
implementation only handles a few easy cases now and will be made more
sophisticated in the future.

This is NFCI: the only user of `getLdStBaseRegImmOfs` (now
`getmemOpBaseRegImmOfs`) is `LoadClusterMotion` and `LoadClusterMotion`
is disabled for x86.

Reviewers: reames, ab, MatzeB, atrick

Reviewed By: MatzeB, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239741 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:14 +00:00
1991e2a4df [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.
Summary:
This instruction encodes a loading operation that may fault, and a label
to branch to if the load page-faults.  The locations of potentially
faulting loads and their "handler" destinations are recorded in a
FaultMap section, meant to be consumed by LLVM's clients.

Nothing generates FAULTING_LOAD_OP instructions yet, but they will be
used in a future change.

The documentation (FaultMaps.rst) needs improvement and I will update
this diff with a more expanded version shortly.

Depends on D10196

Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin

Reviewed By: atrick, pgavlin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:08 +00:00
36395e7598 [NFC] Extract X86MCInstLower::LowerMachineOperand.
Summary: Refactoring-only change that will be used later.

Reviewers: reames, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239739 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:01 +00:00
698a7e58e0 De-duplicate common expression, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 17:03:35 +00:00
b4c2481907 Rangify several for loops, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 16:20:16 +00:00
2ecc72cc58 On behalf of Alexandros Lamprineas:
LLVM targeting aarch64 doesn't correctly produce aligned accesses for non-aligned
data at -O0/fast-isel (-mno-unaligned-access).
The root cause seems to be in fast-isel not producing unaligned access correctly
for -mno-unaligned-access.

The patch just aborts fast-isel for loads and stores when -mno-unaligned-access is
present. 
The regression test is updated to check this new test case (-mno-unaligned-access 
together with fast-isel).

Differential Revision: http://reviews.llvm.org/D10360



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239732 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 15:48:44 +00:00
ad0b09d10e Revert r239721 - Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.
It appears to cause sparc-little-endian.s to assert on Windows and Darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239724 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 10:34:38 +00:00
4a867c7a05 Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.
Summary:
This affects other tools so the previous C++ API has been retained as a
deprecated function for the moment. Clang has been updated with a trivial
patch (not covered by the pre-commit review) to avoid breaking -Werror builds.
Other in-tree tools will be fixed with similar trivial patches.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10366



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239721 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 09:19:41 +00:00
981ffd1bc4 [MachineSink] Improve runtime performance. NFC.
This patch fixes a compilation time issue, when MachineSink faces PHIs
with a huge number of operands. This can happen for example in goto table
based interpreters, where some basic blocks can have several of those PHIs,
each one with several hundreds operands. MachineSink was spending a
significant time re-building and re-sorting the list of successors of
the current MachineBasicBlock. The computing and sorting of the current
MachineBasicBlock successors is now cached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239720 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 09:09:06 +00:00
7a1e93493d [ValueTracking] do not overwrite analysis results already computed
Summary:
ValueTracking used to overwrite the analysis results computed from
assumes and dominating conditions. This patch fixes this issue.

Test Plan: test/Analysis/ValueTracking/assume.ll

Reviewers: hfinkel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239718 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 05:46:29 +00:00
5e1ea386d4 [AArch64] Delete two empty files, which should be removed by r239713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239715 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 02:56:40 +00:00
5ab48a2f69 [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239713 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 01:56:40 +00:00
6024ab3b8f [AArch64] Match interleaved memory accesses into ldN/stN instructions.
Re-commit after adding "-aarch64-neon-syntax=generic" to fix the failure on OS X.
This patch was firstly committed in r239514, then reverted in r239544 because of a syntax incompatible failure on OS X.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 01:35:49 +00:00
49e5e9f0c9 [InstSimplify] fsub nnan x, x -> 0.0 is valid without ninf
Both inf - inf and (-inf) - (-inf) are NaN, so it's already covered by
nnan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 21:01:20 +00:00
f3e82660de [InstSimplify] Add self-fdiv identities for -ffinite-math-only.
When NaNs and Infs are ignored we can fold
 X /  X -> 1.0
-X /  X -> -1.0
 X / -X -> -1.0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239701 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 18:53:58 +00:00
17ae2138b0 AVX-512: Implemented DAG lowering for shuff62x2/shufi62x2 instuctions ( Shuffle Packed Values at 128-bit Granularity )
Tests added , vector-shuffle-512-v8.ll test re-generated.

Differential Revision: http://reviews.llvm.org/D10300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 13:07:47 +00:00
3dd555171e Add support for parsing the XOR operator in Intel syntax inline assembly.
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:59:45 +00:00
6ea3ad7e6e AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:44:55 +00:00
145cdc632a AsmPrinter.cpp: Avoid crashes for targeting like "arm-mingw32". CurrentFnSym might not be <MCSymbolELF> here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239692 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 00:23:40 +00:00
82b72bed60 Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239691 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 00:23:33 +00:00
2a8a1b8c6f [Statepoints] Skip a vector copy when uniquing values.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 19:50:38 +00:00
4bb355e885 [ExecutionEngine] ArrayRefize argument passing.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 19:50:29 +00:00
09eacc1144 C++11 Rangify loops in AssemblyWriter::printModule, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 17:50:47 +00:00
803fe19680 Don't use std::errc.
As noted on Errc.h:

// * std::errc is just marked with is_error_condition_enum. This means that
//   common patters like AnErrorCode == errc::no_such_file_or_directory take
//   4 virtual calls instead of two comparisons.

And on some libstdc++ those virtual functions conclude that

------------------------
int main() {
  std::error_code foo = std::make_error_code(std::errc::no_such_file_or_directory);
  return foo == std::errc::no_such_file_or_directory;
}
-------------------------

should exit with 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239683 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 17:23:04 +00:00
4692cb1303 [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 16:25:12 +00:00
75975e2a29 hoist loop-invariant; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:33:15 +00:00
ea58c7de01 remove function names from comments and clean up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239680 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:32:45 +00:00
4a9a71e3ec [SelectionDAG] Added assertions + UNDEF handling for BSWAP node creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239679 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:23:58 +00:00
4aeeb9e5dc remove unnecessary casts; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239678 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:06:33 +00:00
d8b27b1cb1 [DAGCombiner] Added BSWAP vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 14:08:15 +00:00
6b520d01a2 Stripped trailing whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239674 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:57:36 +00:00
9223c2cb1e Stripped trailing whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:51:39 +00:00
8e2ed1643a Bring in a BumpPtrStringSaver from lld and simplify the interface.
StringSaver now always saves to a BumpPtrAllocator.

The only reason for having the virtual saveImpl is so lld can have a
thread safe version.

The reason for the distinct BumpPtrStringSaver class is to avoid the
virtual destructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:49:52 +00:00
bfc6c664fc AMDGPU: s/R600/AMDGPU/ in the Makefiles
Now the library names in the Makefiles match the library names in
LLVMBuild.txt.

This should hopefully fix the remaining bot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 05:11:14 +00:00
8ce6c58e41 Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()
r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the PostRAScheduler scheduler,
renaming should make this fact clear. Also document that the preferred
way is to specify this in the scheduling model instead of overriding
this method.

Differential Revision: http://reviews.llvm.org/D10427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:42:16 +00:00
6fee0b00e2 MachineLICM: Use TargetSchedModel instead of just itineraries
This will use Itinieraries if available, but will also work if just a
MCSchedModel is available.

Differential Revision: http://reviews.llvm.org/D10428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:42:11 +00:00
953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00
8b8b72ef03 Revert 239644.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 01:08:00 +00:00
31b680fa24 AArch64: map bare-metal arm64-macho triple to MachO MC layer.
Far better than an assertion about expecting ELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239647 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-12 23:37:11 +00:00