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102 Commits

Author SHA1 Message Date
Chris Lattner
5aaf1d2820 Finegrainify namespacification 
Remove one of the operands of a two operand instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11478 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 21:38:28 +00:00
Alkis Evlogimenos
859a18b583 Make dense maps keyed on physical registers smallerusing 
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 21:37:17 +00:00
Alkis Evlogimenos
be766c7246 Remove getAllocatedRegNum(). Use getReg() instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 21:01:20 +00:00
Alkis Evlogimenos
c0b9dc5be7 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 02:27:10 +00:00
Chris Lattner
1cbe4d0ad0 Do not use MachineOperand::isVirtualRegister either! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11283 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 21:12:22 +00:00
Alkis Evlogimenos
4d7af65903 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-14 13:24:17 +00:00
Brian Gaeke
d0fde30ce8 Put all LLVM code into the llvm namespace, as per bug 109. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-11 22:41:34 +00:00
John Criswell
b576c94c15 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-20 19:43:21 +00:00
Alkis Evlogimenos
73ff5120eb Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs 
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
  for (int i = 0; AS[i]; ++i) {
    // use AS[i]
  }
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
  // use *AS
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8960 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-08 05:20:08 +00:00
Misha Brukman
5560c9d49c Spell `necessary' correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7944 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-18 14:43:39 +00:00
Brian Gaeke
19df3876e6 Factory methods for FunctionPasses now return type FunctionPass *. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7823 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-13 18:18:15 +00:00
Chris Lattner
4cc662b0ef Set debug types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7533 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-03 21:47:31 +00:00
Chris Lattner
a11136b16c Move DEBUG to Debug.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7497 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-01 22:21:34 +00:00
Vikram S. Adve
5f2180c533 (1) Added special register class containing (for now) %fsr. 
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-27 00:05:23 +00:00
Chris Lattner
3501feab81 Rename MachineInstrInfo -> TargetInstrInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-14 22:00:31 +00:00
Chris Lattner
80a0478bbb * Use the PHI Elimination pass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5220 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-13 00:26:08 +00:00
Chris Lattner
eb24db9727 Rename FunctionFrameInfo to MachineFrameInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5200 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 21:08:26 +00:00
Chris Lattner
600dee4aae * Convert to be a MachineFunctionPass instance 
* Use new FunctionFrameInfo object to manage stack slots instead of doing
  it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
  logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments

* Use a bitvector to keep track of registers used instead of a set
* Fix problem where explicitly referenced registers would be added to
  regsused set and never removed


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5196 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 20:42:14 +00:00
Chris Lattner
5124aec32f Adjustments to work with the simpler spill interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5144 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-25 05:04:20 +00:00
Chris Lattner
e500864619 Fix compilation on GCC 2.96 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5113 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-23 23:44:04 +00:00
Chris Lattner
aed967cc9e Implicit defs/uses list may be empty. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5103 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-18 01:11:14 +00:00
Chris Lattner
e7d361d15a Use new reginfo interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5099 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 04:19:40 +00:00
Chris Lattner
69c198863d Keep the stack frame aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5081 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 17:42:40 +00:00
Chris Lattner
1d62cea90b Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator. 
Remvoe some dead code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5070 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 14:37:00 +00:00
Chris Lattner
b167c04e62 Some simpliciations to the spill/reload interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5067 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 23:01:26 +00:00
Chris Lattner
8ed9eb5ca3 Simplify PHI node elimination significantly by doing it as a prepass to 
register allocation


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5066 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 22:39:53 +00:00
Chris Lattner
9f366d7ab6 Variety of small or trivial simplifications to the code, completely eliminated 
the dependence on PhysRegClassMap


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5064 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 22:19:19 +00:00
Chris Lattner
f605055994 Remove unused savePhysRegToStack method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5061 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 21:33:51 +00:00
Chris Lattner
01b08c59b4 Localize a map, remove another 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5060 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 21:24:30 +00:00
Chris Lattner
8233e2fe01 Give simple reg allocator a nice Pass Name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5058 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 21:13:12 +00:00
Chris Lattner
15f96db4d9 Add a big assert making sure 2 address instructions are formed right 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5057 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 21:02:20 +00:00
Chris Lattner
3f91ad7ba7 Fix a problem that occurs when PHI nodes have multiple entries for the same predecessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5055 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 20:48:03 +00:00
Chris Lattner
da7e453aac Grab bag of minor cleanups. Export some statistics about the number of 
spills and reloads emitted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5054 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 20:36:09 +00:00
Chris Lattner
198ab640bb Simplify interfaces used by regalloc to insert code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 20:06:35 +00:00
Chris Lattner
c2db1a95df * Simplify code a bit by breaking the PHI node handling stuff out into a seperate 
function from normal regalloc code
* Make the regalloc for a block a function instead of part of runOnMachineBB, which
  makes it easier to see what's going on in runOnMBB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5051 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 19:51:14 +00:00
Chris Lattner
9593fb1503 * Remove some unneccesary instance variables 
* Make allocateStackSpaceFor only allocate the right amount of space


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5048 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 19:07:34 +00:00
Chris Lattner
dd444f9242 pull inverse reg class mapping into a class that is sharable and out of the 
target register description classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5045 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 18:38:59 +00:00
Chris Lattner
abe8dd592d Prune #includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5044 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 18:19:24 +00:00
Chris Lattner
ad44bd99ff Remove extraneous #includes, perform FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5043 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 18:15:24 +00:00
Chris Lattner
71c83728b4 Fix borkness with not using MachineBasicBlocks in PHI nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5035 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 08:02:51 +00:00
Misha Brukman
0868667f78 Fixed a bug where moves due to phis were being neglected. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5019 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 12:33:31 +00:00
Misha Brukman
74676da6f1 Need to insert all moves due to PHI nodes before *ALL* jumps in a predecessor 
basic block, as there could be multiple.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5016 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 11:55:59 +00:00
Misha Brukman
972b03fa53 This should be more correct: invalidates physical registers that are used in 
an instruction to avoid using them to allocate to other virtual registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5013 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 11:33:22 +00:00
Misha Brukman
59b3eedf31 Fixed bug with running out of registers. Also, reinstated namespace which 
disappeared during the last checkin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5007 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 10:42:31 +00:00
Misha Brukman
203b769b20 This should handle register allocating PHI nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5002 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 09:54:36 +00:00
Misha Brukman
cea2245f04 Start allocating stack space at [ebp-4] to not overwrite the return address. 
Also make all loads & stores 4-byte aligned for performance. ;)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4982 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 04:34:02 +00:00
Misha Brukman
d1bedcced2 Take advantage of our knowledge of 2-address X86 instructions and 
register-allocated them appropriately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4976 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-12 23:20:31 +00:00
Misha Brukman
dd46e2a81d Added code generation for function prologues and epilogues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4930 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 23:58:08 +00:00
Misha Brukman
06f8aecc88 Fun arithmetic with iterators aimed at fixing a bug: inserting instructions 
after the *current* instruction while keeping the iterator in the same
'logical' place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4923 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 19:24:45 +00:00
Misha Brukman
dc2ec004f1 This should fix the bug seen with some registers not being allocated 
correctly: skipping instructions by incorrectly incrementing the pointer.

Also adds support for building a reg-to-regclass map, and splits the function
for saving register to stack into two, one suitable for virtual registers
(which also assigns it a physical register) and one for simply storing back
physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4898 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 23:15:19 +00:00