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2048 Commits

Author SHA1 Message Date
Chris Lattner
71a2cb25eb detabify llvm, patch by Mike Stump! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-20 01:22:40 +00:00
Dan Gohman
7925ed05d0 Add support for multiple return values for the PPC target by 
converting call result lowering to use the CallingConvLowering
infastructure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48552 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-19 21:39:28 +00:00
Dale Johannesen
257f75d0b8 Make Complex long long/double/long double work 
in ppc64 mode.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48459 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-17 17:11:08 +00:00
Evan Cheng
d183307639 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48447 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-17 06:56:52 +00:00
Dale Johannesen
fdd3ade005 Next round of PPC32 ABI changes. Allow for gcc 
behavior where a callee thinks a param will be
present in memory, even though the ABI doc says
it doesn't have to be.  Handle complex long long
and complex double (4 and 8 return regs).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48439 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-17 02:13:43 +00:00
Evan Cheng
da47e6e0d0 Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-15 00:03:38 +00:00
Dale Johannesen
8f5422c24b Implement the real calling convention for ppc32 Altivec: 
vectors go at the end of the memory area, after all
non-vector parameters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48364 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-14 17:41:26 +00:00
Dale Johannesen
d75686a471 Do not promote float params to double in varargs 
calls here.  This was done earlier for params in
the varargs part of the params; any float params
that survive to here are in the non-varargs part,
and must not be promoted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48310 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 23:40:01 +00:00
Dale Johannesen
404d99010d One more bit of Altivec parameter passing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48269 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 00:49:20 +00:00
Dale Johannesen
75092de483 Implement Altivec passing to varargs functions on ppc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48264 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 00:22:17 +00:00
Dan Gohman
bfae83139d Use PassManagerBase instead of FunctionPassManager for functions 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 22:29:46 +00:00
Dan Gohman
034f60ed24 Generalize ExpandIntToFP to handle the case where the operand is legal 
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 01:59:03 +00:00
Dale Johannesen
82e4289fc7 Disable prolog code that aligns the stack when a 
local object of >16 byte alignment exists.  It does not
work and getting it to work is not trivial, as explained
in the comment.  This fixes all the remaining ppc32
failures in the struct-layout-1 part of the gcc testsuite.

(gcc does not support this either, and the only way to
get such an object is with __attribute__((aligned)) or
generic vectors; it can't be done in a standard-conforming
program, or with Altivec.  So I think disabling it is OK.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48188 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 22:59:46 +00:00
Bill Wendling
4a66e9a57e Change the "enable/disable" mechanism so that we can enable PPC register 
scavenging for 32-bit and 64-bit separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48186 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 22:49:16 +00:00
Evan Cheng
d2cde68855 Default ISD::PREFETCH to expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 19:38:10 +00:00
Chris Lattner
cb341de0e2 fix 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48166 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 18:55:53 +00:00
Nicolas Geoffray
9348c69dcf Stylistic modifications. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48158 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 17:46:45 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's 
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 15:42:14 +00:00
Nicolas Geoffray
0404cd97e4 Add description of individual bits in CR. This fix PR1765. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48143 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 14:12:10 +00:00
Dale Johannesen
b8cafe3427 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 02:17:22 +00:00
Chris Lattner
dc9971a2e3 Darwin PPC64 indirect call target goes in X12, not R12. This fixes these 
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48120 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 20:49:33 +00:00
Dale Johannesen
7f96f3912e More ppc32 byval handling (bug fixes). Things 
are looking pretty good now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48043 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 01:41:42 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:58:38 +00:00
Dan Gohman
a2fcff4d97 Add support for calls with i128 return values on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:19:12 +00:00
Bill Wendling
5f5bf3a3fd PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this 
by promoting smaller integral values (i32 at this point) to i64, then truncating
to get the wanted size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48030 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:49:02 +00:00
Dan Gohman
9ed06db5c8 Add support for lowering 128-bit shifts on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:36:53 +00:00
Dale Johannesen
8419dd6aa6 Next bits of PPC byval handling. Basically functional 
but there are bugs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48028 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:27:40 +00:00
Chris Lattner
af8ee84fe5 Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48027 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:18:24 +00:00
Chris Lattner
49bd37d369 Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work 
with 32 or 64-bit operands/results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48026 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:13:51 +00:00
Dale Johannesen
1f797a32fd Next bit of PPC ByVal handling; call-site code seems 
correct now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47978 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 23:31:27 +00:00
Bill Wendling
2b5fab67c1 Removed spurious EnablePPCRS check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47918 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:27:33 +00:00
Dale Johannesen
5b3b695c2f Move PPC lowering functions into PPCTargetLowering 
class (cosmetic).  First piece of byval implementation;
this doesn't work yet.  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47917 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:17:14 +00:00
Bill Wendling
880d0f6018 Use a command-line option to turn register scavenging on/off for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47915 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:13:51 +00:00
Bill Wendling
7194aaf738 This is the initial check-in for adding register scavenging to PPC. (Currently, 
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:19:16 +00:00
Chris Lattner
150943c178 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47830 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 19:27:34 +00:00
Chris Lattner
3be4893dce Evan implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47827 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 17:56:29 +00:00
Anton Korobeynikov
8213f9cf94 Use enumeration for preffered EH dwarf encoding reason 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47770 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 22:09:08 +00:00
Dale Johannesen
28d08fdb9f Interface of getByValTypeAlignment differed between 
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 22:31:51 +00:00
Evan Cheng
fb8075d03f Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 00:43:03 +00:00
Anton Korobeynikov
7b1b7f5c5a EHPreferredDataFormat hook for PPC targets. Looks like Darwin 
uses the same encoding everywhere. Linux FIXME'ed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47701 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 23:49:15 +00:00
Dan Gohman
ec59b95a19 Don't hard-code the mask size to be 32, which is incorrect on ppc64 
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 21:12:32 +00:00
Bill Wendling
6ef781f3ce Final de-tabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 06:33:05 +00:00
Dan Gohman
b3564aa836 Convert the last remaining users of the non-APInt form of 
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 01:23:58 +00:00
Bill Wendling
e6d088acc9 Rename PrintableName to Name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 21:47:57 +00:00
Bill Wendling
74ab84c31e Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 21:11:01 +00:00
Bill Wendling
181eb737b2 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 00:56:13 +00:00
Anton Korobeynikov
7c1c261272 Remove bunch of gcc 4.3-related warnings from Target 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47369 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:22:39 +00:00
Andrew Lenharth
d497d9fab6 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 14:46:26 +00:00
Chris Lattner
ec321b4d64 Handle \n's in value names for more targets. The asm printers 
really really really need refactoring :(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47171 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 19:04:54 +00:00
Dale Johannesen
3b407444c9 Cosmetics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47168 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:40:53 +00:00