219 Commits

Author SHA1 Message Date
Eric Christopher
bcc0fa6a64 Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 23:46:43 +00:00
Ahmed Bougacha
7fac1d945f [SelectionDAG] Allow targets to specify legality of extloads' result
type (in addition to the memory type).

The *LoadExt* legalization handling used to only have one type, the
memory type.  This forced users to assume that as long as the extload
for the memory type was declared legal, and the result type was legal,
the whole extload was legal.

However, this isn't always the case.  For instance, on X86, with AVX,
this is legal:
    v4i32 load, zext from v4i8
but this isn't:
    v4i64 load, zext from v4i8
Whereas v4i64 is (arguably) legal, even without AVX2.

Note that the same thing was done a while ago for truncstores (r46140),
but I assume no one needed it yet for extloads, so here we go.

Calls to getLoadExtAction were changed to add the value type, found
manually in the surrounding code.

Calls to setLoadExtAction were mechanically changed, by wrapping the
call in a loop, to match previous behavior.  The loop iterates over
the MVT subrange corresponding to the memory type (FP vectors, etc...).
I also pulled neighboring setTruncStoreActions into some of the loops;
those shouldn't make a difference, as the additional types are illegal.
(e.g., i128->i1 truncstores on PPC.)

No functional change intended.

Differential Revision: http://reviews.llvm.org/D6532


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 00:51:32 +00:00
Aditya Nandakumar
365df40768 We can get the TLOF from the TargetMachine - so constructor no longer requires TargetLoweringObjectFile to be passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-13 21:29:21 +00:00
Aditya Nandakumar
847729d19a This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221878 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-13 09:26:31 +00:00
Eric Christopher
41612a9b85 Remove the target machine from CCState. Previously it was only used
to get the subtarget and that's accessible from the MachineFunction
now. This helps clear the way for smaller changes where we getting
a subtarget will require passing in a MachineFunction/Function as
well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-06 18:45:26 +00:00
Eric Christopher
9f85dccfc6 Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:25:23 +00:00
Chandler Carruth
d61e28d3ec [SDAG] Allow the legalizer to delete an illegally typed intermediate
introduced during legalization. This pattern is based on other patterns
in the legalizer that I changed in the same way. Now, the legalizer
eagerly collects its garbage when necessary so that we can survive
leaving such nodes around for it.

Instead, we add an assert to make sure the node will be correctly
handled by that layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214602 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-02 00:24:54 +00:00
Louis Gerbarg
7d54c5b0f2 Make sure no loads resulting from load->switch DAGCombine are marked invariant
Currently when DAGCombine converts loads feeding a switch into a switch of
addresses feeding a load the new load inherits the isInvariant flag of the left
side. This is incorrect since invariant loads can be reordered in cases where it
is illegal to reoarder normal loads.

This patch adds an isInvariant parameter to getExtLoad() and updates all call
sites to pass in the data if they have it or false if they don't. It also
changes the DAGCombine to use that data to make the right decision when
creating the new load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-31 21:45:05 +00:00
Juergen Ributzka
75909261f0 [DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.
The argument list vector is never used after it has been passed to the
CallLoweringInfo and moving it to the CallLoweringInfo is cleaner and
pretty much as cheap as keeping a pointer to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-01 22:01:54 +00:00
Saleem Abdulrasool
82b1114fef Target: remove old constructors for CallLoweringInfo
This is mostly a mechanical change changing all the call sites to the newer
chained-function construction pattern.  This removes the horrible 15-parameter
constructor for the CallLoweringInfo in favour of setting properties of the call
via chained functions.  No functional change beyond the removal of the old
constructors are intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209082 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-17 21:50:17 +00:00
Jay Foad
b7ba5c2e2e Instead of littering asserts throughout the code after every call to
computeKnownBits, consolidate them into one assert at the end of
computeKnownBits itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:12:55 +00:00
Jay Foad
6b543713a2 Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
inappropriate since it lost its Mask parameter in r154011.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 21:14:37 +00:00
Reid Kleckner
805a83c041 Allow sret on the second parameter as well as the first
MSVC always places the implicit sret parameter after the implicit this
parameter of instance methods.  We used to handle this for
x86_thiscallcc by allocating the sret parameter on the stack and leaving
the this pointer in ecx, but that doesn't handle alternative calling
conventions like cdecl, stdcall, fastcall, or the win64 convention.

Instead, change the verifier to allow sret on the second parameter.

This also requires changing the Mips and X86 backends to return the
argument with the sret parameter, instead of assuming that the sret
parameter comes first.

The Sparc backend also returns sret parameters in a register, but I
wasn't able to update it to handle secondary sret parameters.  It
currently calls report_fatal_error if you feed it an sret in the second
parameter.

Reviewers: rafael.espindola, majnemer

Differential Revision: http://reviews.llvm.org/D3617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-09 22:32:13 +00:00
Craig Topper
a7f892b33b Convert SelectionDAG::getMergeValues to use ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 19:20:57 +00:00
Craig Topper
80d8db7a1f Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207327 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 18:35:24 +00:00
Craig Topper
c848b1bbcf [C++] Use 'nullptr'. Target edition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-25 05:30:21 +00:00
Craig Topper
84f7f350c3 Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-04 05:16:06 +00:00
Benjamin Kramer
d628f19f5d [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 12:27:27 +00:00
Venkatraman Govindaraju
f06322b3ef [Sparc] 80 column rule. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 02:28:34 +00:00
Roman Divacky
14551f041b Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding
expensive libcall. Also, Qp_neg is not implemented on at least
FreeBSD. This is also what gcc is doing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 19:26:29 +00:00
Benjamin Kramer
570d544799 SPARC: Implement TRAP lowering. Matches what GCC emits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201994 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 21:43:52 +00:00
Roman Divacky
3bd3f426a5 Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201718 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 21:35:39 +00:00
Venkatraman Govindaraju
44ad4d00b4 [Sparc] Emit correct relocations for PIC code when integrated assembler is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200961 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 04:24:35 +00:00
Venkatraman Govindaraju
f2f6d44f43 [Sparc] Use SparcMCExpr::VariantKind itself as MachineOperand's target flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200960 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 02:36:06 +00:00
Jakob Stoklund Olesen
17ca0f8f80 Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:48:46 +00:00
Venkatraman Govindaraju
771023dbcb [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.
Otherwise, assembler (gas) fails to assemble them with error message "operation
combines symbols in different segments". This is because MC computes
pc_rel entries with subtract expression between labels from different sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 04:51:35 +00:00
Jakob Stoklund Olesen
9df203d30e Clean up the Legal/Expand logic for SPARC popc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200141 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 08:12:34 +00:00
Jakob Stoklund Olesen
742f5b57c4 Only generate the popc instruction for SPARC CPUs that implement it.
The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200131 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 06:09:59 +00:00
Jakob Stoklund Olesen
06626a6924 Fix swapped CASA operands.
Found by SingleSource/UnitTests/AtomicOps.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200130 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 06:09:54 +00:00
Venkatraman Govindaraju
dd38992ae8 [SparcV9] Add support for JIT in Sparc64.
With this change, all supported tests in test/ExecutionEngine pass in sparcv9.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199977 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 07:10:19 +00:00
Jakob Stoklund Olesen
c30791627e Implement atomicrmw operations in 32 and 64 bits for SPARCv9.
These all use the compare-and-swap CASA/CASXA instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199975 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 06:23:31 +00:00
Venkatraman Govindaraju
6a0fffd799 [Sparc] Add support for inline assembly constraints which specify registers by their aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199786 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 03:18:42 +00:00
Venkatraman Govindaraju
29b1a24a42 [Sparc] Add support for inline assembly constraint 'I'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 01:29:51 +00:00
Lang Hames
5f33cbc414 Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).

Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:56:36 +00:00
Jakob Stoklund Olesen
1655be290c The SPARCv9 ABI returns a float in %f0.
This is different from the argument passing convention which puts the
first float argument in %f1.

With this patch, all returned floats are treated as if the 'inreg' flag
were set. This means multiple float return values get packed in %f0,
%f1, %f2, ...

Note that when returning a struct in registers, clang will set the
'inreg' flag on the return value, so that behavior is unchanged. This
also happens when returning a float _Complex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-12 04:13:17 +00:00
Chandler Carruth
974a445bd9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 11:48:04 +00:00
Bill Wendling
b87d142ba1 Remove unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198585 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:00:00 +00:00
Bill Wendling
4644d79871 Refactor function that checks that __builtin_returnaddress's argument is constant.
This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198579 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 00:43:20 +00:00
Bill Wendling
4a816471f5 Emit an error message if the value passed to __builtin_returnaddress isn't a constant
__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198531 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 01:47:20 +00:00
Venkatraman Govindaraju
6e202a960e [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64.
Fixes PR18356.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 07:17:21 +00:00
Venkatraman Govindaraju
447c3480e5 [Sparc] Handle atomic loads/stores in sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 22:11:54 +00:00
Venkatraman Govindaraju
924ac6dc0c [SparcV9]: Custom lower UMULO/SMULO so that the arguments are send to __multi3() in correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 20:22:45 +00:00
Venkatraman Govindaraju
0c67825459 [SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall().
This makes the sparc backend to generate Sparc64 ABI compliant code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-29 04:27:21 +00:00
Venkatraman Govindaraju
5b9918957a [SparcV9]: Implement lowering of long double (fp128) arguments in Sparc64 ABI.
Also, pass fp128 arguments to varargs through integer registers if necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-29 01:20:36 +00:00
Venkatraman Govindaraju
847b5d976d [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196755 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 05:13:25 +00:00
Venkatraman Govindaraju
dc50e9af4b [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196751 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 04:02:15 +00:00
Venkatraman Govindaraju
e0dc442801 [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
This fixes PR18150.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08 22:06:07 +00:00
Venkatraman Govindaraju
591719e304 [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195573 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-24 17:41:41 +00:00
Roman Divacky
3e94418e85 Expand rotate instructions on sparcv9 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194500 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 19:04:45 +00:00
Venkatraman Govindaraju
fcd5e86396 [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 12:28:40 +00:00