Chris Lattner 
							
						 
					 
					
						
						
							
						
						b097aa9353 
					 
					
						
						
							
							Allow undef in a shuffle mask  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27714  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-14 23:19:08 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						1a635d617a 
					 
					
						
						
							
							Move the rest of the PPCTargetLowering::LowerOperation cases out into  
						
						... 
						
						
						
						separate functions, for simplicity and code clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27693  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-14 06:01:58 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						f1b4708950 
					 
					
						
						
							
							Pull the VECTOR_SHUFFLE and BUILD_VECTOR lowering code out into separate  
						
						... 
						
						
						
						functions, which makes the code much cleaner :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27692  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-14 05:19:18 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						a39d798e0a 
					 
					
						
						
							
							Force non-darwin targets to use a static relo model.  This fixes PR734,  
						
						... 
						
						
						
						tested by CodeGen/Generic/vector.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27657  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-13 17:10:48 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						ac225ca051 
					 
					
						
						
							
							Add a new way to match vector constants, which make it easier to bang bits of  
						
						... 
						
						
						
						different types.
Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load,
implementing PowerPC/vec_constants.ll:test1.  This compiles:
typedef float vf __attribute__ ((vector_size (16)));
typedef int vi __attribute__ ((vector_size (16)));
void test(vi *P1, vi *P2, vf *P3) {
  *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000};
  *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF};
  *P3 = vec_abs((vector float)*P3);
}
to:
_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        vspltisw v0, -1
        vslw v0, v0, v0
        lvx v1, 0, r3
        vand v1, v1, v0
        stvx v1, 0, r3
        lvx v1, 0, r4
        vandc v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vandc v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr
instead of (with two constant pool entries):
_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        li r6, lo16(LCPI1_0)
        lis r7, ha16(LCPI1_0)
        li r8, lo16(LCPI1_1)
        lis r9, ha16(LCPI1_1)
        lvx v0, r7, r6
        lvx v1, 0, r3
        vand v0, v1, v0
        stvx v0, 0, r3
        lvx v0, r9, r8
        lvx v1, 0, r4
        vand v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vand v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr
GCC produces (with 2 cp entries):
_test:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc00c
        mtspr 256,r0
        lis r2,ha16(LC0)
        lis r9,ha16(LC1)
        la r2,lo16(LC0)(r2)
        lvx v0,0,r3
        lvx v1,0,r5
        la r9,lo16(LC1)(r9)
        lwz r12,-4(r1)
        lvx v12,0,r2
        lvx v13,0,r9
        vand v0,v0,v12
        stvx v0,0,r3
        vspltisw v0,-1
        vslw v12,v0,v0
        vandc v1,v1,v12
        stvx v1,0,r5
        lvx v0,0,r4
        vand v0,v0,v13
        stvx v0,0,r4
        mtspr 256,r12
        blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27624  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-12 19:07:14 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						e87192a854 
					 
					
						
						
							
							Rename get_VSPLI_elt -> get_VSPLTI_elt  
						
						... 
						
						
						
						Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively.  This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-12 17:37:20 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						2b1c3258d6 
					 
					
						
						
							
							Ensure that zero vectors are always v4i32, which forces them to CSE with  
						
						... 
						
						
						
						each other.  This implements CodeGen/PowerPC/vxor-canonicalize.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-12 16:53:28 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						bee9836c0f 
					 
					
						
						
							
							Vector function results go into V2 according to GCC.  The darwin ABI doc  
						
						... 
						
						
						
						doesn't say where they go :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27579  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-11 01:38:39 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						06c24350a9 
					 
					
						
						
							
							Move some return-handling code from lowerarguments to the ISD::RET handling stuff.  
						
						... 
						
						
						
						No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27577  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-11 01:21:43 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						a1d95e16df 
					 
					
						
						
							
							properly mark vector selects as expanded to select_cc  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27544  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-08 22:59:15 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						710ff32983 
					 
					
						
						
							
							Add VRRC select support  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27543  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-08 22:45:08 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						79d9a88165 
					 
					
						
						
							
							Implement PowerPC/CodeGen/vec_splat.ll:spltish to use vsplish instead of a  
						
						... 
						
						
						
						constant pool load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27538  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-08 07:14:26 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						140a58f9df 
					 
					
						
						
							
							Change the interface to the predicate that determines if vsplti* can be used.  
						
						... 
						
						
						
						No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-08 06:46:53 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						90217999bd 
					 
					
						
						
							
							Make sure to return the result in the right type.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27469  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 23:12:19 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						f24380e78e 
					 
					
						
						
							
							Match vpku[hw]um(x,x).  
						
						... 
						
						
						
						Convert vsldoi(x,x) to work the same way other (x,x) cases work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27467  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 22:28:36 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						caad163496 
					 
					
						
						
							
							Add support for matching vmrg(x,x) patterns  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27463  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 22:02:42 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						116cc48e30 
					 
					
						
						
							
							Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 21:11:54 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						d0608e191f 
					 
					
						
						
							
							Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to  
						
						... 
						
						
						
						lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27450  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 18:26:28 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						ddb739e5ea 
					 
					
						
						
							
							Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into  
						
						... 
						
						
						
						vperm with a perm mask lvx'd from the constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27448  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-06 17:23:16 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						9b42bdd7bc 
					 
					
						
						
							
							Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27439  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-05 17:39:25 +00:00 
						 
				 
			
				
					
						
							
							
								Evan Cheng 
							
						 
					 
					
						
						
							
						
						278158b487 
					 
					
						
						
							
							Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-05 06:09:26 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						098e699f21 
					 
					
						
						
							
							Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27413  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-04 22:28:35 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						7ff7e67458 
					 
					
						
						
							
							Ask legalize to promote all vector shuffles to be v16i8 instead of having to  
						
						... 
						
						
						
						handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-04 17:25:31 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						b68314480d 
					 
					
						
						
							
							Revert accidentally committed hunks.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-03 23:58:04 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						01cae0799d 
					 
					
						
						
							
							Make sure to mark unsupported SCALAR_TO_VECTOR operations as expand.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27385  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-03 23:55:43 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						bbe77de450 
					 
					
						
						
							
							Inform the dag combiner that the predicate compares only return a low bit.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-02 06:26:07 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						541f91b17c 
					 
					
						
						
							
							Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into  
						
						... 
						
						
						
						"vspltisb v0, 8" instead of a constant pool load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-04-02 00:43:36 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						e3fea5a1c1 
					 
					
						
						
							
							Rearrange code a bit  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 19:52:36 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						32a988a095 
					 
					
						
						
							
							Add, sub and shuffle are legal for all vector types  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 19:48:58 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						33497cc992 
					 
					
						
						
							
							note to self: *save* file, then check it in  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27291  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 06:04:53 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						4468c22458 
					 
					
						
						
							
							Implement an item from the readme, folding vcmp/vcmp. instructions with  
						
						... 
						
						
						
						identical instructions into a single instruction.  For example, for:
void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}
we now generate:
_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr
instead of:
_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr
Testcase here: CodeGen/PowerPC/vcmp-fold.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27290  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 06:02:07 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						a17b1557ad 
					 
					
						
						
							
							Lower vector compares to VCMP nodes, just like we lower vector comparison  
						
						... 
						
						
						
						predicates to VCMPo nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 05:13:27 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						36f4b0da9d 
					 
					
						
						
							
							Mark INSERT_VECTOR_ELT as expand  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27276  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-31 01:48:55 +00:00 
						 
				 
			
				
					
						
							
							
								Nate Begeman 
							
						 
					 
					
						
						
							
						
						98e70cc124 
					 
					
						
						
							
							Add a few more altivec intrinsics  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-28 04:15:58 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						7f20b13518 
					 
					
						
						
							
							Use normal lvx for scalar_to_vector instead of lve*x.  They do the exact  
						
						... 
						
						
						
						same thing and we have a dag node for the former.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-28 01:43:22 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						48b61a729d 
					 
					
						
						
							
							Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-28 00:40:33 +00:00 
						 
				 
			
				
					
						
							
							
								Nate Begeman 
							
						 
					 
					
						
						
							
						
						f15485a8d0 
					 
					
						
						
							
							SelectionDAGISel can now natively handle Switch instructions, in the same  
						
						... 
						
						
						
						manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-27 01:32:24 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						6d92caddc4 
					 
					
						
						
							
							Codegen vector predicate compares.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27151  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-26 10:06:40 +00:00 
						 
				 
			
				
					
						
							
							
								Evan Cheng 
							
						 
					 
					
						
						
							
						
						5b6a01b59c 
					 
					
						
						
							
							Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27149  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-26 09:52:32 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						8d052bc711 
					 
					
						
						
							
							Add some basic patterns for other datatypes  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27116  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-25 07:39:07 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						9c61dcf1aa 
					 
					
						
						
							
							Codegen things like:  
						
						... 
						
						
						
						<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>
Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1
instead of using constant pool loads.
This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27106  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-25 06:12:06 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						7fbcef7102 
					 
					
						
						
							
							Disable the i32->float G5 optimization.  It is unsafe, as documented in the  
						
						... 
						
						
						
						comment.
This fixes 177.mesa, and McCat/09-vor with the td scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27060  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-24 07:53:47 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						64b3a08bc6 
					 
					
						
						
							
							add support for using vxor to build zero vectors.  This implements  
						
						... 
						
						
						
						Regression/CodeGen/PowerPC/vec_zero.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27059  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-24 07:48:08 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						ecfe55e65b 
					 
					
						
						
							
							When possible, custom lower 32-bit SINT_TO_FP to this:  
						
						... 
						
						
						
						_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr
instead of this:
_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr
This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-22 05:30:33 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						9b3bd467d0 
					 
					
						
						
							
							These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26930  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-21 20:51:05 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						23baa1b310 
					 
					
						
						
							
							remove dead variable  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26907  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-20 22:37:23 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						bd83afd3cd 
					 
					
						
						
							
							Fix a couple of bugs in permute/splat generate, thanks to Nate for actually  
						
						... 
						
						
						
						figuring these out! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26904  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-20 18:26:51 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						dd4d2d0e40 
					 
					
						
						
							
							Add support for generating vspltw, instead of a vperm instruction with a  
						
						... 
						
						
						
						constant pool load.  This generates significantly nicer code for splats.
When tblgen gets bugfixed, we can remove the custom selection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26898  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-20 06:51:10 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						88a99ef7cc 
					 
					
						
						
							
							Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26897  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-20 06:37:44 +00:00 
						 
				 
			
				
					
						
							
							
								Chris Lattner 
							
						 
					 
					
						
						
							
						
						ef819f8fbb 
					 
					
						
						
							
							fix duplicate definition errors  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26896  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2006-03-20 06:33:01 +00:00