before it determines which callee-save registers are to be spilled. This allows
the target to make changes such as forcing certain physical registers to be
spilled.
- Modified comments. It's important to note the order of registers in the array
returns by getCalleeSaveRegs() determines the order of callee save spill code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30635 91177308-0d34-0410-b5e6-96231b3b80d8
AggregateString += "\0\0";
Doesn't add two nuls to the AggregateString (for obvious reasons), which
broke the asmprinter when the first character of an asm string was not
literal text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30625 91177308-0d34-0410-b5e6-96231b3b80d8
a function, do it up front in linear time (going through all of the
instructions once). We create a map out of them. Then it's no problem to
use the information in it during elimination...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30624 91177308-0d34-0410-b5e6-96231b3b80d8
character, and ${:uid} which expands to a unique ID for the MachineInstr.
More can be added if/when they are needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30619 91177308-0d34-0410-b5e6-96231b3b80d8
has no associated operand. This is useful for portably encoding stuff like
the comment character into an asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30617 91177308-0d34-0410-b5e6-96231b3b80d8
int x __attribute__((used));
to:
.data
.comm _x,4 ; 'x'
.no_dead_strip _x
on both x86 and ppc darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30605 91177308-0d34-0410-b5e6-96231b3b80d8
or when splitting loops with a common header into multiple loops. In particular
the old code would always insert the preheader before the old loop header. This
is disasterous in cases where the loop hasn't been rotated. For example, it can
produce code like:
.. outside the loop...
jmp LBB1_2 #bb13.outer
LBB1_1: #bb1
movsd 8(%esp,%esi,8), %xmm1
mulsd (%edi), %xmm1
addsd %xmm0, %xmm1
addl $24, %edi
incl %esi
jmp LBB1_3 #bb13
LBB1_2: #bb13.outer
leal (%edx,%eax,8), %edi
pxor %xmm1, %xmm1
xorl %esi, %esi
LBB1_3: #bb13
movapd %xmm1, %xmm0
cmpl $4, %esi
jl LBB1_1 #bb1
Note that the loop body is actually LBB1_1 + LBB1_3, which means that the
loop now contains an uncond branch WITHIN it to jump around the inserted
loop header (LBB1_2). Doh.
This patch changes the preheader insertion code to insert it in the right
spot, producing this code:
... outside the loop, fall into the header ...
LBB1_1: #bb13.outer
leal (%edx,%eax,8), %esi
pxor %xmm0, %xmm0
xorl %edi, %edi
jmp LBB1_3 #bb13
LBB1_2: #bb1
movsd 8(%esp,%edi,8), %xmm0
mulsd (%esi), %xmm0
addsd %xmm1, %xmm0
addl $24, %esi
incl %edi
LBB1_3: #bb13
movapd %xmm0, %xmm1
cmpl $4, %edi
jl LBB1_2 #bb1
Totally crazy, no branch in the loop! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30587 91177308-0d34-0410-b5e6-96231b3b80d8
reachable, making it general purpose enough for use by InsertPreheaderForLoop.
Eliminate custom dominfo updating code in InsertPreheaderForLoop, using
UpdateDomInfoForRevectoredPreds instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30586 91177308-0d34-0410-b5e6-96231b3b80d8
